SLAAE22 June   2021 DAC63204


  1.   Design Objective
  2.   Design Description
  3.   Design Notes
  4.   Design Simulations
    1.     Transient Simulation Results
  5.   Register Settings
  6.   Pseudo Code Example
  7.   Design Featured Devices
  8.   Design References

Register Settings

Register Settings for DAC53204 Voltage Margining
Register AddressRegister NameSettingDescription
0x1FCOMMON-CONFIG0x1249[15] 0b0: Write 0b1 to set window-comparator output to a latching output
[14] 0b0: Write 0b1 to lock device. Unlock by writing 0b0101 to DEV-UNLOCK field in the COMMON-TRIGGER register
[13] 0b0: Write 0b1 to set fault-dump read enable at address 0x01
[12] 0b1: Enables the internal reference
[11:10] 0b00: Powers-up VOUT3
[9] 0b1: Powers-down IOUT3
[8:7] 0b00: Powers-up VOUT2
[6] 0b1: Powers-down IOUT2
[5:4] 0b00: Powers-up VOUT1
[3] 0b1: Powers-down IOUT1
[2:1] 0b00: Powers-up VOUT0
[0] 0b1: Powers-down IOUT0
0x24GPIO-CONFIG0x01F5[15] 0b0: Write 0b1 to enable glitch filter on GPI
[14] 0b0: Don't care
[13] 0b0: Write 0b1 to enable output mode on GPIO pin
[12:9] 0b0000: Selects the STATUS function setting mapped to GPIO as output
[8:5] 0b1111: Enables GPI function on all channels
[4:1] 0b1010: Selects GPI to trigger margin-high, margin-low
[0] 0b1: Enables input mode for GPIO pin
0x20COMMON-TRIGGER0x0002[15:12] 0b0000: Write 0b0101 to unlock the device
[11:8] 0b0000: Write 0b1010 to trigger a POR reset
[7] 0b0: Write 0b1 to trigger LDAC operation if the respective SYNC-CONFIG-X bit in the DAC-X-FUNC-CONFIG register is 1
[6] 0b0: Write 0b1 to set the DAC registers and outputs to zero-code or mid-code based on the respective CLR-SEL-X bit in the DAC-X-FUNC-CONFIG register
[5] 0b0: Don't care
[4] 0b0: Write 0b1 to trigger fault-dump sequence
[3] 0b0: Write 0b1 to trigger PROTECT function
[2] 0b0: Write 0b1 to read one row of NVM for fault-dump
[1] 0b1: Write 0b1 to store applicable register settings to the NVM
[0] 0b0: Write 0b1 to reload applicable registers with existing NVM settings
0x01, 0x07, 0x0D, 0x13DAC-X-MARGIN-HIGH0xA940[15:6] 0x2A5: 10-bit data updates the MARGIN-HIGH code
[5:0] 0b000000: Don't care
0x02, 0x08, 0x0E, 0x14DAC-X-MARGIN-LOW0x02C0[15:6] 0x00B: 10-bit data updates the MARGIN-LOW code
[5:0] 0b000000: Don't care