SLAT161 June   2022 HD3SS3411 , TMUXHS4412

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2What is PCI Express (PCIe)?
    1. 2.1 PCIe Link
    2. 2.2 PCIe Clocking Architectures
      1. 2.2.1 Common Reference Clock
      2. 2.2.2 Data Reference Clock
      3. 2.2.3 Separate Reference Clock
    3. 2.3 PCIe Reference Clock Specification
  5. 3Reference Clock Measurement With TI Multiplexers
    1. 3.1 Test Setup and Procedure
      1. 3.1.1 Test Setup
      2. 3.1.2 Test Procedure
    2. 3.2 Test Report
      1. 3.2.1 Test Result With Clock Source
      2. 3.2.2 Test Result With HD3SS3411
      3. 3.2.3 Test Result With TMUXHS4412
      4. 3.2.4 Test Result With TMUXHS221
  6. 4Summary

2.2.1 Common Reference Clock

Figure 2-2 shows the common refclk architecture. In the common refclk architecture, the same reference clock is distributed to both transmit (Tx) and receive (Rx) devices, so it does not introduce any difference in clock between the PCIe components. An advantage of this clocking architecture is that it supports spread spectrum clocking (SSC), which can be very useful in reducing EMI.

GUID-20220628-SS0I-TNNZ-7W53-LRNPHFCPJMM5-low.png Figure 2-2 Common Clock Architecture