SLAU966 February 2025 MSPM0C1103 , MSPM0C1103-Q1 , MSPM0C1104 , MSPM0C1104-Q1 , MSPM0C1105 , MSPM0C1106 , MSPM0C1106-Q1 , MSPM0G1106 , MSPM0G1107 , MSPM0G1506 , MSPM0G1507 , MSPM0G1518 , MSPM0G1519 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3518 , MSPM0G3518-Q1 , MSPM0G3519 , MSPM0G3519-Q1 , MSPM0H3216 , MSPM0L1105 , MSPM0L1106 , MSPM0L1116 , MSPM0L1117 , MSPM0L1227 , MSPM0L1227-Q1 , MSPM0L1228 , MSPM0L1228-Q1 , MSPM0L1303 , MSPM0L1304 , MSPM0L1304-Q1 , MSPM0L1305 , MSPM0L1305-Q1 , MSPM0L1306 , MSPM0L1306-Q1 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346 , MSPM0L2228
MSPM0 and NXP's M0 MCUs both support I2C. In both MSPM0 and NXP's M0 MCUs, the I2C functionality is handled by the I2C module.
| Feature | S32K1xx | KEA128x | KM35x | MSPM0 |
|---|---|---|---|---|
| Controller and target modes | Yes | Yes | Yes | Yes |
| Multi-controller capability | Yes | Yes | Yes | Yes |
| Standard-mode (up to 100 kHz) | Yes | Yes | Yes | Yes |
| Fast-mode (up to 400 kHz) | Yes | Yes | Yes | Yes |
| Fast-mode Plus (up to 1 MHz) | Yes | Yes | Yes | Yes |
| Addressing mode | 7 or 10 bit | 7 or 10 bit | 7 or 10 bit | 7 or 10 bit |
| Peripheral addresses | 1 address (later) | 1 address | 1 address | 2 addresses |
| General call | Yes | Yes | Yes | Yes |
| Programmable setup and hold times | Yes | Yes | Yes | No |
| Event management | No | No | No | Yes |
| Clock stretching | Yes | Yes | Yes | Yes |
| Software reset | Yes | Yes | Yes | Yes |
| FIFO/Buffer | Yes (Controller Only) | N/A | N/A | TX: 8 byte |
| RX: 8 byte | ||||
| DMA | Yes (Target Only) | No | No | Yes |
| Programmable analog and digital noise filters | No | Equivalent | Equivalent | Yes |
I2C code examples
Information about I2C code examples can be found in the MSPM0 SDK examples guide.