SLAZ241O October 2012 – May 2021 MSP430F4783
TB Module
Functional
First increment of TBR erroneous when IDx > 00
The first increment of TBR after any timer clear event (POR/TBCLR) happens immediately following the first positive edge of the selected clock source (INCLK, SMCLK, ACLK, or TBCLK). This is independent of the clock input divider settings (ID0, ID1). All following TBR increments are performed correctly with the selected IDx settings.
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