SLAZ369Q October 2012 – May 2021 MSP430FG4619
FLL Module
Functional
FLLDx = 11 for /8 may generate an unstable MCLK frequency
When setting the FLL to higher frequencies using FLLDx = 11 (/8) the output frequency of the FLL may have a larger frequency variation (e.g. averaged over 2sec) as well as a lower average output frequency than expected when compared to the other FLLDx bit settings.
None