SLUP412 February   2022 LMG3522R030-Q1

 

  1. 1 Introduction
  2. 2 Comparing Different Technologies
  3. 3 Advantages of Integrating the Driver With GaN FETs
  4. 4 The GaN-Based 6.6-kW OBC Reference Design
  5. 5 PFC Stage
  6. 6 DC/DC Stage
  7. 7 DC/DC Topology Selection
  8. 8 Frequency Selection
  9. 9 Core Loss
  10. 10Loss of ZVS
  11. 11Dead Time
  12. 12ISR Bandwidth
  13. 13Overall
  14. 14Resonant Tank Design
  15. 15Thermal Solution
  16. 16Layout Best Practices
  17. 17Control-Loop Considerations
  18. 18Conclusions
  19. 19References
  20. 20Important Notice

12 ISR Bandwidth

The interrupt service routine (ISR) is a software routine that performs the time-sensitive calculations necessary to regulate the converter output and manage system-level protection. There are limits on how many instructions the microcontroller can do during its ISR. A single 200-MHz C2000 core can provide approximately 170 million instructions per second, with which it can comfortably control both a two-phase 120-kHz PFC and a 500-kHz resonant CLLLC. Higher operating frequencies might require the use of an additional processor, which could make the design both larger and more expensive.