SLUSAM3A May 2011 – December 2016 BQ76PL536A-Q1
PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The bq76PL536A-Q1 is a series cell Lithium-Ion battery monitor and secondary protector for Electric Vehicles (EV), Hybrid Electric Vehicles (HEV), Uninterruptible Power Systems (UPS), E-Bike/Scooter, Large-Format Battery Systems, and so forth.
To allow for optimal performance in the end application, special consideration must be taken to ensure minimization of measurement error through proper printed circuit board (PCB) layout.
An anti-aliasing filter is required for each VCn input VC6–VC1, consisting of a 1-kΩ, 1% series resistor and 100-nF capacitor. Good-quality components should be used. A 1% resistor is recommended, because the resistor creates a small error by forming a voltage divider with the input impedance of the part. The part is factory-trimmed to compensate for the error introduced by the filter.
The CS_H pin is active-low. The host asserts the pin to a logic zero to initiate communications. The CS pin should remain low until the end of the current packet. When the CS_H pin is asserted, the SPI receiver and interface of the device are reset and resynchronized. This action ensures that a slave device that has lost synchronization during a previous transmission or as the result of noise on the bus does not remain permanently hung. CS_H must be driven false (high) between packets; see Timing Requirements: AC SPI Data Interface, for timing details.
Full-size reference schematics are available from TI on request.
For this design example, use the parameters listed in Table 9.
PARAMETER | DESCRIPTION | EXAMPLE VALUE | UNIT |
---|---|---|---|
CEMI | EMI Capacitor | 3300 | pF |
CFILT | Filter Capacitor | 0.1 | µF |
CIN | Input Capacitor | 0.1 | µF |
CREGOUT | REGOUT Capacitor | 2.2 (minimum) | µF |
CVDDA_1 | Internal analog 5-V LDO bypass connection 1 | 2.2 | µF |
CVDDA_2 | Internal analog 5-V LDO bypass connection 2 | 0.2 | µF |
CVDD_D_1 | Capacitor for internal digital 5-V LDO bypass connection 1 | 2.2 | µF |
CVDD_D_2 | Capacitor for internal digital 5-V LDO bypass connection 2 | 0.2 | µF |
CVREF | VREF Capacitor | 10 | µF |
LEMI | EMI Ferrite Resistor | 500 | Ω |
RBAL | Balance Resistor | 47 | Ω |
RIN | Input Resistor | 1 | kΩ |
RPULL1-RPULL3 | Pullup Resistors for digital open-drain I/O | 10 | kΩ |
RPULL4-RPULL5 | Pullup Resistors for general-purpose (differential) analog input (GPAI), connect to VSS if unused | kΩ |
Use the following for the procedure for the recommended front-end circuit: