SLUUCI9A January   2022  – December 2022 UCC28781

 

  1.   Abstract
  2.   Trademarks
  3. Introduction
  4. General Texas Instruments High Voltage Evaluation (TI HV EVM) User Safety Guidelines
  5. Description of EVM
  6. Electrical Performance Specifications of EVM
  7. Schematic Diagram of EVM
  8. Operating the EVM from a DC or an AC Source
    1. 6.1 Typical Applications
    2. 6.2 Using the EVM with a DC Voltage Source
    3. 6.3 Using the EVM with an AC Voltage Source
  9. Test Set-ups
    1. 7.1 Test Set-up Requirements
      1. 7.1.1 Test Set-up Requirements for DC Input
      2. 7.1.2 Test Set-up Requirements for AC Input
    2. 7.2 Test Set-up Diagrams
    3. 7.3 Terminals and Test Points
  10. Performance Data and Typical Characteristic Curves
    1. 8.1 Table of Efficiency Measurements with DC Input
    2. 8.2 Table of Efficiency Measurements with AC Input
    3. 8.3 Efficiency Graphs with DC Input Voltage (Typical Results)
    4. 8.4 Switching Frequencies in Various Operating Modes
    5. 8.5 Key Switching Waveforms and Operating Mode Load Current
    6. 8.6 Thermal Images at Full Load (15 V, 4.0 A) with DC and AC Inputs
  11. Transformer Details
  12. 10EVM Assembly and Layout
  13. 11List of Materials
  14. 12Revision History

Terminals and Test Points

Table 7-1 Input / Output Terminals and Test-Point Functions
Terminals and TEST POINTS NAME DESCRIPTION
J1-1 Terminal Block J1 LINE Primary-side AC-input "Line" or Line-1.
J1-2 NEUT Primary-side AC-input "Neutral" or Line-2.
J2-1 Terminal Block J2 Vbulk0 Primary-side rectified and filtered positive voltage output "Vbulk0" (+) derived from AC source.
J2-2 GND_P0 Primary-side rectified and filtered negative voltage output "GND_P0" (-) derived from AC source.
J3-1 Terminal Block J3 Vbulk Primary-side positive voltage input "Vbulk" (+) derived from DC source.
J3-2 GND_P Primary-side negative voltage input "GND_P" (-) derived from DC source.
J4-1 Terminal Block J4 VOUT Secondary-side DC voltage output "VOUT" (+) positive connection.
J4-2 GND_S Secondary-side DC voltage output "GND_S" (-) negative connection.
J5-1 3-Pin Header J5 AC-Sense Primary-side sense and discharge path from X-capacitor.
J5-2 XCD Primary-side connection to XCD pins of UCC28781-Q1 controller.
J5-3 GND_P Primary-side ground reference, used to disable XCD function.
TP1 Input test point near J1-1 LINE Primary-side AC input monitor point - Line (or Line 1).
TP2 Input test point near J1-2 NEUT Primary-side AC input monitor point - Neutral (or Line 2).
TP3 Output test point near J4-2 GND_S Secondary-side DC output monitor "GND_S" (-) ground reference.
TP4 Output test point near J4-1 VOUT Secondary-side DC output monitor "VOUT" (+) positive reference.
TP5 Output test point near J4-1 VOUT_A Secondary-side DC insertion point "VOUT_A" for small-signal loop-stability analysis.