3 Conclusion

Designing ESD protection into a system can be successful with the proper techniques applied. Following these ESD layout guide outlines will ensure the TVS has optimum conditions for dissipating the ESD.

In summary:

• Control Impedances around the TVS for dissipating ESD current, I_ESD:
  • Minimize any inductance between the ESD Source and the path to ground through the TVS
  • Place the TVS as near to the connector as design rules allow
  • Place the Protected IC much further from the TVS than the TVS is to the connector
  • Do not use stubs between the TVS and the Protected Line, route directly from the ESD Source to the TVS
  • Minimizing inductance between the TVS and ground is critical
• Limit the effects of EMI on unprotected circuits:
  • Do not route unprotected circuits in the area between the ESD Source and the TVS
  • Place the TVS as near to the connector as design rules allow
  • Route with straight traces between the ESD Source and the TVS if possible
  • If corners must be used curves are preferred and a maximum of 45° is acceptable
• Properly use VIAs to maximize ESD dissipation by the TVS:
  • Avoid VIAs between the ESD Source and the TVS if possible
  • If a VIA is required between the ESD Source and the Protected IC, route directly from the ESD Source to the TVS before using the VIA
• Use a grounding scheme that has very low impedance:
  • Connect the TVS Ground Pin directly to a same layer ground plane that has nearby VIAs stitching to an adjacent internal ground plane
  • Use multiple ground planes when possible
  • Use a chassis screw, connected to PCB ground, near to the TVS and ESD Source (for example, the connector ground shield)
  • Use VIAs of large diameter with a large drill, which lowers impedance

Related Documentation

• Texas Instruments, ESD Packaging and Layout Guide.