SLVUBI2A July   2018  – October 2020 TPS650330-Q1 , TPS650331-Q1

 

  1.   Trademarks
  2. Introduction
  3. Requirements
  4. Operation Instructions
    1. 3.1 Configuring the USB to I2C Adapter
    2. 3.2 Regulator Input Supplies and Features
      1. 3.2.1 Buck 1 Input Supply
      2. 3.2.2 Mid-Vin Buck1 Features
      3. 3.2.3 Buck 2 Input Supply
      4. 3.2.4 Buck 3 Input Supply
      5. 3.2.5 Low-Vin Buck2 and Buck3 Features
      6. 3.2.6 LDO Input Supply
      7. 3.2.7 Low Noise LDO Features
    3. 3.3 Selecting the Logic Supply Voltage
  5. EVM Configurations
  6. Test Points
    1. 5.1 Voltage Test Points
  7. Graphical User Interface
    1. 6.1 TPS650330-Q1 EVM Debugging
      1. 6.1.1 I2C Communication Port and Adapter Debugging
      2. 6.1.2 Updating MCU Firmware
    2. 6.2 Navigating the GUI
      1. 6.2.1 Home
      2. 6.2.2 Block Diagram
      3. 6.2.3 Registers
      4. 6.2.4 Device Configuration
        1. 6.2.4.1 Using Device Configuration to Define Spin Settings
        2. 6.2.4.2 Configuring the Power Sequence
      5. 6.2.5 Re-Program PMIC
    3. 6.3 In-Circuit Programming
  8. Typical Performance Plots
    1. 7.1 Power Sequence Plots
    2. 7.2 Load Transient Plots
    3. 7.3 Output Voltage Ripple Plots
    4. 7.4 Efficiency Plots
    5. 7.5 LDO Output Noise
  9. TPS650330-Q1 EVM Schematic
  10. TPS650330-Q1 EVM PCB Layers
  11. 10TPS650330-Q1 EVM Bill of Materials
  12. 11TPS650330-Q1 Silicon Revision Changes
  13. 12Revision History

Configuring the Power Sequence

The Sequencing Overview tab includes instruments to customize the power sequence of the PMIC. Note that the check boxes are power sequence masks. If a particular logic signal needs to be included as part of the regulator or logic power up sequence, leave the box next to the logic signal unchecked. TI recommends to set Power On Bit unmasked for each rail that is required in the application.

GUID-20200915-CA0I-BRTR-QZLP-1D84XVD20V5L-low.pngFigure 6-10 Sequencing Overview Tab
When using a TPS65033x-Q1 device, the GPIO pin can also be used for power sequencing of an external regulator or other device. In the Special Features tab, configure GPIO as an output to include its sequencing in the Sequencing Overview tab. Note that when using GPIO for sequencing, the GPIO Function must be Enabled.
GUID-20200915-CA0I-PSX6-3V8D-TZFSSHV1DTNN-low.pngFigure 6-11 Sequencing Overview Including GPIO
For reference, the GUI can generate example power-up and power-down timing diagrams based on the sequence settings present when the UPDATE TIMING DIAGRAM button is clicked. As noted, rise and fall times are approximate, and the maximum sequence length is 200 ms. Changes to regulator enable and output discharge settings are reflected in the timing diagram. If the sequence settings are not valid, the GUI will provide a notifying message and the timing diagram will not be updated. For example, if a regulator is enabled but fails to power-up within 200 ms, the sequence settings are not valid.
GUID-20200915-CA0I-GXKH-Q8ZJ-L9ZDQ98TKD45-low.pngFigure 6-12 GUI Generated Timing Diagram