SLVUBO3A April   2019  – October 2020 TPS650330-Q1

 

  1.   Trademarks
  2. 1BOOSTXL-TPS65033 Components and Environment
  3. 2BOOSTXL-TPS65033 Board Information
    1. 2.1 Critical Socketed Board Connections
      1. 2.1.1 Power Switches
    2. 2.2 Jumpers and Test Points
  4. 3Programming GUI Operation
    1. 3.1 Initial Set-up
      1. 3.1.1 Finding the GUI
      2. 3.1.2 Offline Installation
      3. 3.1.3 Flashing the MSP430F5529 LaunchPad
      4. 3.1.4 Flashing the MSP432E401Y Launch Pad
    2. 3.2 Connection Debugging
    3. 3.3 Basic Operation of the GUI
      1. 3.3.1 Home
      2. 3.3.2 Block Diagram
      3. 3.3.3 Registers
      4. 3.3.4 Device Configuration
        1. 3.3.4.1 Using Device Configuration to Define Spin Settings
        2. 3.3.4.2 Configuring the Power Sequence
    4. 3.4 Scripting
  5. 4Recommended Operating Procedure
  6. 5BOOSTXL-TPS65033 Schematic
  7. 6BOOSTXL-TPS65033 Board Layers
  8. 7BOOSTXL-TPS65033 Bill of Materials
  9. 8Revision History

2.1 Critical Socketed Board Connections

Critical connections for operating the socketed board are the 5 V rail, the 3.3 V rail, and the I2C pins. The remaining connections to the LaunchPad are left available for future experimentation. Note: I2C pull-ups must be pulled up to VIO. This can optionally be pulled up to 3.3 V (default) or an alternate rail through the J12.

By default, the 3.3 V rail must be present to power the VIO and GPIO pins to fully enable the PMIC. If evaluation without a PC is desired, both the 5 V and the VIO domains should be externally supplied. If VIO is supplied by a voltage other than 3.3 V, J12 should be left open to prevent potential current paths to the MCU 3.3 V. For most configurations, the PMIC can supply VIO when externally connected to an appropriate test point, for example the Buck 1 output if configured for 3.3 V, or the Buck 2 output if configured for 1.8 V.