SLVUC05A November   2020  – July 2022 TPS25750


  1.   Read This First
    1.     About This Manual
    2.     Notational Conventions
    3.     Glossary
    4.     Related Documents
    5.     Support Resources
    6.     Trademarks
  2. 1Introduction
    1. 1.1 Introduction
      1. 1.1.1 Purpose and Scope
    2. 1.2 PD Controller Host Interface Description
      1. 1.2.1 Overview
      2. 1.2.2 Register and Field Notation
    3. 1.3 Unique Address Interface
      1. 1.3.1 Unique Address Interface Protocol
      2. 1.3.2 Unique Address Interface Registers
  3. 2Unique Address Interface Register Detailed Descriptions
    1. 2.1  0x03 MODE Register
    2. 2.2  0x0D DEVICE_CAPABILITIES Register
    3. 2.3  0x14 - 0x19 INT_EVENT, INT_MASK, INT_CLEAR Registers
    4. 2.4  0x1A STATUS Register
    5. 2.5  0x26 POWER_PATH_STATUS Register
    6. 2.6  0x29 PORT_CONTROL Register
    7. 2.7  0x2D BOOT_STATUS Register
    8. 2.8  0x30 RX_SOURCE_CAPS Register
    9. 2.9  0x31 RX_SINK_CAPS Register
    10. 2.10 0x32 TX_SOURCE_CAPS Register
    11. 2.11 0x33 TX_SINK_CAPS Register
    12. 2.12 0x34 ACTIVE_CONTRACT_PDO Register
    13. 2.13 0x35 ACTIVE_CONTRACT_RDO Register
    14. 2.14 0x3F POWER_STATUS Register
    15. 2.15 0x40 PD_STATUS Register
    16. 2.16 GPIO Events
    17. 2.17 0x69 TYPEC_STATE Register
    18. 2.18 0x70 SLEEP_CONFIG Register
    19. 2.19 0x72 GPIO_STATUS Register
  4. 34CC Task Detailed Descriptions
    1. 3.1 Overview
    2. 3.2 PD Message Tasks
      1. 3.2.1 'SWSk' - PD PR_Swap to Sink
      2. 3.2.2 'SWSr' - PD PR_Swap to Source
      3. 3.2.3 'SWDF' - PD DR_Swap to DFP
      4. 3.2.4 'SWUF' - PD DR_Swap to UFP
      5. 3.2.5 'GSkC' - PD Get Sink Capabilities
      6. 3.2.6 'GSrC' - PD Get Source Capabilities
      7. 3.2.7 'SSrC' - PD Send Source Capabilities
    3. 3.3 Patch Bundle Update Tasks
      1. 3.3.1 'PBMs' - Start Patch Burst Mode Download Sequence
      2. 3.3.2 'PBMc' - Patch Burst Mode Download Complete
      3. 3.3.3 'PBMe' - End Patch Burst Mode Download Sequence
      4. 3.3.4 Patch Burst Mode Example
      5. 3.3.5 'GO2P' - Go to Patch Mode
    4. 3.4 System Tasks
      1. 3.4.1 'DBfg' - Clear Dead Battery Flag
      2. 3.4.2 'I2Cr' - I2C Read Transaction
      3. 3.4.3 'I2Cw' - I2C Write Transaction
  5. 4User Reference
    1. 4.1 PD Controller Application Customization
    2. 4.2 Loading a Patch Bundle
  6. 5Revision History

0x14 - 0x19 INT_EVENT, INT_MASK, INT_CLEAR Registers

Bytes 1 to 10 of this register are port-specific, but Byte 11 is common to all ports in the PD controller.

Table 2-6 0x14 - 0x19 INT_EVENTX, INT_MASKX, INT_CLEARX Registers
AddressNameAccessLengthUnique Per PortPower-Up Default
0x15 Reserved
0x16INT_MASK1RW11yesInitialized by Application Configuration
0x17 Reserved
0x19 Reserved
Table 2-7 0x14 - 0x19 INT_EVENTX, INT_MASKX, INT_CLEARX Registers Bit Field Definitions
Byte 11: Patch Status (common to all slave ports)
2I2CMasterNACKedA transaction on the I2C master was NACKed.
1ReadyForPatchDevice ready for a patch bundle from the host.
0PatchLoadedPatch was loaded to the device.
Bytes 9-10:
1TXMemBufferEmptyTransmit memory buffer empty.
Bytes 5-8:
31:15 Reserved
14ErrorUnableToSourceThe Source was unable to increase the voltage to the negotiated voltage of the contract.
13:12 Reserved
11PlugEarlyNotificationA connection has been detected but not debounced.
10SnkTransitionCompleteThis event only occurs when in source mode (PD_STATUS.PresentPDRole = 1b). It occurs tSrcTransition (ms) after sending an Accept message to a Request message, just before sending the PS_RDY message.
7ErrorMessageDataAn erroneous message was received.
6ErrorProtocolErrorAn unexpected message was received from the partner device.
4ErrorMissingGetCapMessageThe partner device did not respond to the Get_Sink_Cap or Get_Source_Cap message that was sent.
3ErrorPowerEventOccurredAn OVP, or ILIM event occurred on VBUS. Or a TSD event occurred.
2ErrorCanProvideVoltageOrCurrentLaterThe USB PD Source can provide acceptable voltage and current, but not at the present time. A "wait" message was sent or received.
1ErrorCannotProvideVoltageOrCurrentThe USB PD Source cannot provide an acceptable voltage and/or current. A Reject message was sent to the Sink or a Capability Mismatch was received from the Sink.
0ErrorDeviceIncompatibleWhen set to 1, a USB PD device with an incompatible specification version was connected. Or the partner device is not USB PD capable.
Bytes 1-4:
30CMDCompleteSet whenever a non-zero value in CMD register is set to zero or !CMD.
27PDStatusUpdateSet whenever contents of PD_STATUS register (0x40) change.
26StatusUpdateSet whenever contents of STATUS register (0x1A) change.
25 Reserved
24PowerStatusUpdateSet whenever contents of POWER_STATUS register (0x3F) change.
23PPswitchChangedSet whenever contents of POWER_PATH_STATUS register (0x26) changes.
21UsbHostPresentNoLongerSet when STATUS.UsbHostPresent transitions to anything other than 11b.
20UsbHostPresentSet when STATUS.UsbHostPresent transitions to 11b.
18DRSwapRequestedA DR swap was requested by the Port Partner.
17PRSwapRequestedA PR swap was requested by the Port Partner.
14SourceCapMsgRcvdThis is asserted when a Source Capabilities message is received from the Port Partner.
13NewContractAsProvAn RDO from the far-end device has been accepted and the PD Controller is a Source. This is asserted after the PS_RDY message has been sent. See ACTIVE_CONTRACT_PDO register (0x34) and ACTIVE_CONTRACT_RDO register (0x35) for details.
12NewContractAsConsFar-end source has accepted an RDO sent by the PD Controller as a Sink. See ACTIVE_CONTRACT_PDO register (0x34) and ACTIVE_CONTRACT_RDO register (0x35) for details.
11:6 Reserved
5DRSwapCompleteA Data Role swap has completed. See STATUS register (0x1A) and PD_STATUS register (0x40) for port state.
4PRSwapCompleteA Power role swap has completed. See STATUS register (0x1A) and PD_STATUS register (0x40) for port state.
3PlugInsertOrRemovalUSB Plug Status has Changed. See Status register for more plug details.
1PDHardResetA PD Hard Reset has been performed. See PD_STATUS.HardResetDetails for more information.
This feature is not supported by TPS25750_F509.04.02.
This feature is not supported by TPS25750_F509.04.02.
This feature is not supported by TPS25750_F509.05.02.