SLVUDI2 September   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Board Overview
    2. 2.2 Key Features
      1. 2.2.1 Processor
      2. 2.2.2 Memory and Storage
      3. 2.2.3 Interface and Peripherals
      4. 2.2.4 Expansion Connectors and Expansion Headers to Support Application-Specific Capes
    3. 2.3 Power Requirements
      1. 2.3.1 Integrated Power Architecture
      2. 2.3.2 Advanced Power Management Features
    4. 2.4 Header Information
      1. 2.4.1 Cape Expansion Headers
      2. 2.4.2 65 Possible Digital I/Os
      3. 2.4.3 PWMs and Timers
      4. 2.4.4 Analog Inputs
      5. 2.4.5 UART
      6. 2.4.6 I2C
      7. 2.4.7 SPI
    5. 2.5 Detailed Hardware Design
      1. 2.5.1 USB Interface
        1. 2.5.1.1 USB 2.0 Type-A Interface
        2. 2.5.1.2 USB 2.0 Type-C® Interface
      2. 2.5.2 Ethernet Interface
      3. 2.5.3 Power Supply Interface
      4. 2.5.4 DDR3L SDRAM Interface
      5. 2.5.5 eMMC Flash Interface
      6. 2.5.6 Micro SD Card Slot Interface
      7. 2.5.7 Grove Connector Interfaces
        1. 2.5.7.1 Grove I2C Interface (J4)
        2. 2.5.7.2 Grove UART Interface (J5)
  8. 3Hardware Design Files
    1. 3.1 Schematics, PCB Layout and BOM
  9. 4Compliance Information
    1. 4.1 Compliance – FCC Requirement
  10. 5Additional Information
    1. 5.1 Known Hardware or Software Issues
    2. 5.2 Trademarks
    3. 5.3 Brand Uses Approval
  11. 6Related Documentation

2.5.4 DDR3L SDRAM Interface

BeagleBone Green Eco incorporates 512MB of DDR3L SDRAM (Kingston D2516ECMDXGJDI-U), providing the main system memory for applications and operating system functions. The memory communicates with the AM335x processor through a 16-bit data bus operating at speeds up to 800MT/s.

DDR3L technology operates at 1.35V (compared to 1.5V for standard DDR3), improving energy efficiency while maintaining performance. This makes the board an excellent choice for both battery-powered and continuously-powered applications.

The memory interface includes data lines (D0–D15), address lines (A0–A15), bank address lines (BA0–BA2), and control signals (CLK, CKE, CS, RAS, CAS, and WE) connected directly to the processor. The interface also features differential data strobe signals (DQS0/DQS0N and DQS1/DQS1N) to provide accurate data transfer timing, particularly at high speeds.

For system development and debugging, all memory address and data lines are accessible through test points on the board. During normal operation, the memory automatically enters self-refresh mode when the system enters low-power states, helping to conserve energy while preserving data.

The DDR3L memory is completely managed by the AM335x processor, and developers typically do not need to interact with memory directly as the operating system and software development tools handle memory management automatically.

BEAGL-BONE-GRN-ECO DDR3L SDRAM Interface Block Diagram Figure 2-7 DDR3L SDRAM Interface Block Diagram