SLYU050B June   2020  – July 2021 TMAG5110 , TMAG5110-Q1 , TMAG5111 , TMAG5111-Q1

 

  1.   Trademarks
  2. 1Overview
    1. 1.1 Kit Contents
    2. 1.2 Related Documentation From Texas Instruments
  3. 2Hardware
    1. 2.1 Features
  4. 3Operation
    1. 3.1 Quick Start Setup
    2. 3.2 EVM Operation
  5. 4Circuitry
    1. 4.1 Power Block
    2. 4.2 Hall Device Block
      1. 4.2.1 TMAG5110 Side
      2. 4.2.2 TMAG5111 Side
    3. 4.3 Quadrature Decoder Block
      1. 4.3.1 TMAG5110 Side
      2. 4.3.2 TMAG5111 Side
    4. 4.4 Up/Down Counter Block
      1. 4.4.1 TMAG5110 Side
      2. 4.4.2 TMAG5111 Side
    5. 4.5 LED Array Decoder Block
      1. 4.5.1 TMAG5110 Side
      2. 4.5.2 TMAG5111 Side
  6. 5Schematics, PCB Layout, and Bill of Materials
    1. 5.1 Schematics
    2. 5.2 PCB Layout
    3. 5.3 Bill of Materials
  7. 6Revision History

4.4.1 TMAG5110 Side

U3 is the CD74HC190, which is a BCD up/down counter. This counter only counts on the rising edge of the pulse sent from the quadrature decoder (U2). The pre-settable pins are set to GND to give an initial value of 0. C3 is a bypass capacitor that is placed near the IC to help mitigate power supply noise and provide current quickly to the device when needed. C8 and R6 create an RC filter which are used with a single Schmitt-Trigger buffer (U8, SN74LVC1G17) to delay the LOAD signal for the up/down counter (U3). This is done so that the initial value of 0 is loaded to the counter after the device has been powered on.