SNIU028D February 2016 – September 2020 UCD3138 , UCD3138064 , UCD3138064A , UCD3138128 , UCD3138A , UCD3138A64
Address 00060008 – Filter 2 CPU XN Register
Address 00090008 – Filter 1 CPU XN Register
Address 000C0008 – Filter 0 CPU XN Register
8 | 0 |
CPU_SAMPLE |
R/W-0 0000 0000 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
8-0 | CPU_SAMPLE | R/W | 0 0000 0000 | Forced Xn value, allows processor to use filter as ALU. Set Bit 2 of Filter Control Register to ‘1’ to force CPU_SAMPLE as input to Filter. |