SNLA344B June   2020  – March 2022 DP83826E , DP83826I

 

  1.   Trademarks
  2. 1Introduction
  3. 2 EtherCAT Specification Requirements
  4. 3Different Methods of Setting up the PHY
    1. 3.1 Using Serial Management Interface to Setup DP83826 PHY
    2.     6
    3. 3.2 Using Strap Configuration to Set Up DP83826 PHY for EtherCAT Configuration
  5. 4References
  6. 5Revision History

Using Strap Configuration to Set Up DP83826 PHY for EtherCAT Configuration

The section describing hardware bootstrap configuration in the DP83826 Deterministic, Low-Latency, Low-Power, 10/100 Mbps, Industrial Ethernet PHY data sheet describes how the device can be configured without using the Serial Management Interface (SMI). This section of the data sheet presents two configuration options: ENHANCED mode and BASIC mode.

When setting up the PHY to work in an EtherCAT® system, it is important that the PHY has an LED which is set up to show 100 Mbit full duplex and the signal polarity is active low or configurable for some ESCs.

If SMI is not used to program the PHY, the DP83826 must be set up in hardware to support ENHANCED function to enable EtherCAT functionality.

To define the LED polarity, the following circuit can be used to make either high or low polarity configuration. The PHY has an internal circuit which measures the polarity that is needed and automatically configures this depending on the input signal. Figure 3-3 shows this internal circuit.


GUID-9E0ABB78-76F3-414E-8E27-8F88BEE9D6AB-low.gif

Figure 3-3 Example Strap Connections

In some cases, pending the strap settings this automatic LED feature has been disabled, see the hardware bootstrap configuration section of the data sheet for more details.

When setting up the DP83826 device to work in an EtherCAT system without SMI, use the configuration presented in Table 3-2.

Table 3-2 DP83826 Strap Pin Configuration for EtherCAT®
Strap Number | Pin Enhanced Function Default Strap Setting

Strap 0 | pin 16

Auto negotiation disable.

Force mode 100 M enabled

0 (Enable)

0(Enable)

Strap 1 | pin 31

Odd Nibble Detection disabled

1 (enable)

0 (Disable)

If Strap7 = 1, only RX_Error and Signal

Energy detect will be enabled for FLD.

Strap 2 | pin 30

PHY_ADD0

0 (pull down)

Define address with pull up

Strap 3 | pin 29

PHY_ADD1

0 (pull down)

Define address with pull up

Strap 4 | pin 28

PHY_ADD2

0 (pull down)

Define address with pull up

Strap 5 | pin 22

RMII mode

0

(master mode)

0 (master mode)

Not needed due to MII mode chosen

Strap 6 | pin 20

Function on Pin 31

0 (CLKOUT 25 MHz)

1 (LED1)

Strap 7 | pin 13

Fast link-drop enable

All available mechanisms will be enabled

except MLT3_Error.

0 (disable)

1 (Enable)

If Strap1 = 0, only RX_Error and Signal

Energy detect will be enabled for FLD.

Strap 8 | pin 14

MII MAC mode

ALT. Function: When Strap1 =0 AND

Strap7 =1, Signal Energy Detect enabled

0 (MII mode)

1 (Signal Energy Detect disabled)

Strap 9 | pin 15

Auto MDIX

0 (enable)

0(enable)

Strap 10 | pin 18

Applicable only when auto-MDIX is disabled

Enhanced function

0 (MDIX)

0 (MDIX)

Not needed due to auto MDIX enabled

Pin 1

1 (Pull up)

NC(Enhanced mode Enable)

The information in this table shows that fast link down must be enabled in a special way. Only enable Fast link Down using RX Error Count as a detection feature.