SNLA389A December   2021  – May 2022 DP83TC812R-Q1 , DP83TC812S-Q1 , DP83TC813R-Q1 , DP83TC813S-Q1 , DP83TC814R-Q1 , DP83TC814S-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Hardware Configuration
    1. 2.1 Schematic
  4. 3Software Configuration
  5. 4Testing PMA
    1. 4.1 PMA Testing Procedure
  6. 5Testing IOP: Link-up and Link-down
    1. 5.1 IOP Testing Procedure
  7. 6Testing SQI
    1. 6.1 SQI Value Interpretation
  8. 7Testing TDR
    1. 7.1 TDR Testing Procedure
  9. 8Testing EMC and EMI
  10. 9Revision History

IOP Testing Procedure

Use the following IOP testing procedure:

  • Start of measurement:

    For the IOP tests measuring link-up time either after power-up or after hardware reset, it is important to start the measurement of link-up time after the initialization configuration is loaded back into DP83TC81x. As the configuration is loaded into the PHY by a controller, we recommend the controller to give an indication (a software bit or an IO state) after the last configuration register is written. This indicator going high is the start of measurement of link-up time.

  • Status to be polled:

    Link-status is indicated by bit 2 of register 0x1: 1 = link-up; 0 = link-down. This should be polled to indicate the event of link-up or link-down during these tests.

Note:
  • If system desires no automatic link-up after power-up (link to only happen after writing the initialization script), managed mode of DP83TC81x should be used by using strap on pin LED_1.
  • The PHY supports the bootstrap option to configure in Autonomous or Managed mode and it is in Autonomous mode by default. Managed mode strap option is recommended to prevent the link up process from initiating while the software configuration is being executed. Once the software configuration is completed, the PHY can be removed from Managed mode by setting bit 0x18B[6] to ‘0’.