SNLA389A December   2021  – May 2022 DP83TC812R-Q1 , DP83TC812S-Q1 , DP83TC813R-Q1 , DP83TC813S-Q1 , DP83TC814R-Q1 , DP83TC814S-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Hardware Configuration
    1. 2.1 Schematic
  4. 3Software Configuration
  5. 4Testing PMA
    1. 4.1 PMA Testing Procedure
  6. 5Testing IOP: Link-up and Link-down
    1. 5.1 IOP Testing Procedure
  7. 6Testing SQI
    1. 6.1 SQI Value Interpretation
  8. 7Testing TDR
    1. 7.1 TDR Testing Procedure
  9. 8Testing EMC and EMI
  10. 9Revision History

SQI Value Interpretation

Register bits 0x871[3:1] contain the SQI value. This register can be polled to understand the appropriate range of MSE values for each SQI value.

Table 6-1 SQI Values for Register Bits 0x871[3:1]
0x871 [3:1] OPEN ALLIANCE SQI MSE VALUES
0x0

SQI = 0 (Worst)

MSE > 133

0x1

SQI = 1

11 < MSE ≤ 133

0x2

SQI = 2

7 < MSE ≤ 11

0x3

SQI = 3

5 < MSE ≤ 7

0x4

SQI = 4

4 < MSE ≤ 5

0x5

SQI = 5

3 < MSE ≤4

0x6

SQI = 6

2 < MSE ≤ 3

0x7

SQI = 7 (Best)

MSE ≤ 2