SNVAA30 December   2021 LM5170-Q1

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Commercial Vehicle Power System
    2. 1.2 Operation of Battery Equalizer
  3. 2Designing Buck Converter with LM5170-Q1
    1. 2.1 VHV to VLV Buck Converter with 13-A Maximum Output Current
    2. 2.2 Inner Current Loop Design
    3. 2.3 Outer Voltage Loop Design
    4. 2.4 Implementation of Current Limit
  4. 3Experimental verification
  5. 4Conclusion
  6. 5References

Inner Current Loop Design

As shown in Figure 2-2, LM5170-Q1 provides COMP pin where type II compensation network can be designed externally. It’s important to select right RCOMP1, CCOMP1, and CHF1 based on system transfer function. The poles and zeros of current loop system are determined by

Equation 1. F P _ P L A N T = R C S + R S 2 π × L m  
Equation 2. F P _ C O M P = 1 2 π × R C O M P 1 × C H F 1  
Equation 3. F Z _ C O M P = 1 2 π × R C O M P 1 × C C O M P 1  

where RS is the entire resistance on the LV port to the loads, and 50 mΩ assumed in this case.

Figure 2-2 Inner Current Loop Control in LM5170-Q1

The compensation network’s components are selected based on following guidance. FSW is switching frequency of LM5170-Q1 and FCO_CUR is the current loop crossover frequency.

  1. FCO_CUR is set to 1/10 ~ 1/5 of FSW
  2. The total inner current loop gain is set to unity at FCO_CUR
  3. The zero FZ_COMP is placed at approximately close to the power plant pole FP_PLANT
  4. The pole FP_COMP is placed at approximately one or two decades higher than FZ_COMP, but lower than FSW

Select RCOMP1 = 1.15 kΩ, CCOMP1 = 330 nF, and CHF1 = 3.3 nF which can meet in the following equations.

Equation 4. F S W = 40   k × 100   k H z R O S C = 40   k × 100   k H z 40.2   k = 99.5   k H z  
Equation 5. F C O _ C U R = 1 5 × F S W = 19.9   k H z  
Equation 6. F P _ P L A N T = 5   m + 50   m 22   u H = 398   H z  
Equation 7. F Z _ C O M P = 1 2 π × 1.15   k × 330   n F   = 419   H z  
Equation 8. F P _ C O M P = 1 2 π × 1.15   k × 3.3   n F   = 41.9   k H z  
Figure 2-3 Bode Plot of Inner Current Loop

Figure 2-3 shows bode plot of inner current loop. Type II compensation network boosts the phase in mid-frequency range. In this example, the current loop crossover frequency is at about 20 kHz, and the phase margin is approximately 58 degree, which is higher than the needed minimal 45 degree of a stable system. FP_COMP is placed at 41.9 kHz which is lower than the switching frequency (99.5 kHz). This helps to minimize output ripple caused by MOSFET switching.