SNVU760 February   2021

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Related Documentation
    2. 1.2 TPS3704x-Q1 Applications
  3. 2Schematic, Bill of Materials, and Layout
    1. 2.1 TPS3704Q1EVM Schematic
    2. 2.2 TPS3704Q1EVM Bill of Materials
    3. 2.3 Layout and Component Placement
    4. 2.4 Layout
  4. 3EVM Connectors
    1. 3.1 EVM Test Points
    2. 3.2 EVM Jumpers
  5. 4EVM Setup and Operation
    1. 4.1 Supply Voltage (VDD)
    2. 4.2 Monitoring Input Voltage
    3. 4.3 Default Reset Outputs (RESET1 and RESET2)
    4. 4.4 Optional Reset Output (RESET3)
  6. 5Revision History

3.2 EVM Jumpers

Table 3-2 lists the jumpers on the TPS3704Q1EVM. As ordered, the EVM will have sixteen (16) jumpers installed. Figure 3-1 is provided as visual aid.

Table 3-2 List of Onboard Jumpers
JUMPERJUMPER CONFIGUATIONDESCRIPTION
J1 & J5J1-Open & J5-top positionFor direct monitoring of VIN1. Default position.
J1 & J5J1-Shunt & J5-bottom positionFor monitoring of VIN1 via R4, R8 resistor divider (ADJ) version.
J2 & J6J2-Open & J6-top positionFor direct monitoring of VIN2. Default position.
J2 & J6J2-Shunt & J6-bottom positionFor monitoring of VIN2 via R3, R7 resistor divider (ADJ) version.
J3 & J7J3-Open & J7-top positionFor direct monitoring of VIN3. Default position.
J3 & J7J3-Shunt & J7-bottom positionFor monitoring of VIN3 via R2, R6 resistor divider (ADJ) version.
J4 & J8J4-Open & J8-top positionFor direct monitoring of VIN4. Default position.
J4 & J8J4-Shunt & J8-bottom positionFor monitoring of VIN4 via R1, R5 resistor divider (ADJ) version.
J9Left or RightLeft for RESET1 pull up to VDD, Right for pull up to Vpu1. Default position is Left.
J10Left or RightLeft for RESET2 pull up to VDD, Right for pull up to Vpu2. Default position is Left.
J11Left or RightLeft for RESET3 pull up to VDD, Right for pull up to Vpu3. Default position is Left.
J12OpenSENSE4 testpoint (TP4) connects directly to SENSE4 pin of IC. Default position.
J12ShuntRESET3 output pin of IC connected to RESET3 test point (TP7). J4 & J8 must be left Open.Valid for TPS37043 device variants.
J13ShuntHigh frequency input capacitor placed in parallel with SENSE1 input pin to provide better noise immunity for noisy applicaitions. Default position is Open.
J14ShuntHigh frequency input capacitor placed in parallel with SENSE2 input pin to provide better noise immunity for noisy applicaitions. Default position is Open.
J15ShuntHigh frequency input capacitor placed in parallel with SENSE3 input pin to provide better noise immunity for noisy applicaitions. Default position is Open..
J16ShuntHigh frequency input capacitor placed in parallel with SENSE4 input pin to provide better noise immunity for noisy applicaitions. Default position is Open.
GUID-0C298ECF-12D3-49AA-9F71-6F17AAD16A3E-low.svgFigure 3-1 Layout—Top