SPAU024 April   2025 AM2612

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
      1.      Preface: Read This First
        1. 1.1.1.1 Sitara MCU+ Academy
        2. 1.1.1.2 Important Usage Notes
    2. 1.2 Kit Contents
    3. 1.3 Specification
      1. 1.3.1 Component Identification
      2. 1.3.2 Functional Block Diagram
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1  Setup
      1. 2.1.1 Configuration 1: Standalone Configuration
      2. 2.1.2 Configuration 2: AM26x controlCARD Backward Compatibility Configuration
      3. 2.1.3 Configuration 3: Baseboard Configuration
    2. 2.2  Power Requirements
      1. 2.2.1 Power Tree
      2. 2.2.2 Power Sequence
      3. 2.2.3 Power Status LEDs
      4. 2.2.4 PMIC
    3. 2.3  Header Information
      1. 2.3.1 Baseboard Headers (J1, J2, J3)
      2. 2.3.2 XDS Debug Header (J4)
      3. 2.3.3 MIPI-60 Header (J5)
    4. 2.4  Push Buttons
    5. 2.5  Reset
    6. 2.6  Clock
    7. 2.7  Boot Mode Selection
    8. 2.8  GPIO Mapping
    9. 2.9  Interfaces
      1. 2.9.1 Memory Interface
        1. 2.9.1.1 OSPI
        2. 2.9.1.2 Board ID EEPROM
      2. 2.9.2 I2C
      3. 2.9.3 SPI
      4. 2.9.4 UART
      5. 2.9.5 JTAG
      6. 2.9.6 TRACE
      7. 2.9.7 ADC and DAC
      8. 2.9.8 Off-SOM Peripherals
        1. 2.9.8.1 MCAN
        2. 2.9.8.2 LIN
        3. 2.9.8.3 FSI
        4. 2.9.8.4 USB
        5. 2.9.8.5 Ethernet
          1. 2.9.8.5.1 RGMII
          2. 2.9.8.5.2 PRU-ICSS
    10. 2.10 Test Points
    11. 2.11 Best Practices
  8. 3Software
  9. 4Hardware Design Files
  10. 5Additional Information
    1. 5.1 Trademarks
  11. 6References

2.10 Test Points

The AM261x controlSOM includes multiple test points to aid in hardware debug. Table 2-18 includes a list of the test points available on the controlSOM.

Table 2-18 AM261-SOM-EVM Test Points
Test Point Designator Test Point Net Name Description
TP1 VPP_1V8 AM261x VPP supply from VDDA18_LDO_1V8 (internally generated analog 1.8V)
TP2 COMP2_OUT PMIC comparator 2 output
TP3 VMAIN_5V0 SOM system 5V input
TP4 1V8_LDO4 PMIC LDO4 1.8V output
TP5 COMP1_OUT PMIC comparator 1 output
TP6 VMAIN_12V0 U22 boost converter 12V output
TP7 3V3_LDO2 PMIC LDO2 3.3V output. Secondary 3.3V I/O system voltage
TP8 VCC_6V0 PMIC buck-boost 6V output. Input to 1.2V core voltage regulator (U3)
TP9 5V0_LDO3 PMIC LDO3 5V output
TP10 VSYS_3V3_LDO1 PMIC LDO1 3.3V output. Primary 3.3V I/O system voltage.
TP11 PMIC_SPI1_CLK PMIC SPI clock
TP12 PMIC_SPI1_D0 PMIC SPI Data 0
TP13 VREG_1P8_OUT PMIC 1.8V internal analog/digital supply
TP14 PMIC_SPI1_CS0 PMIC SPI chip select
TP15 VREG_OUT PMIC gate-drive supply for the buck-boost regulator
TP16 VCC_1V2 1.2V AM261x core voltage supply
TP17 VDD_IO_3V3 3.3V AM261x I/O voltage supply
TP18 MCU_PORz AM261x power-on-reset
TP19 VDDA18_LDO_1V8 AM261x internal analog LDO 1.8V output
TP20 VDDS18_LDO_1V8 AM261x internal digital LDO 1.8V output
TP21 GND GND
TP22 +1V2 U3 buck converter 1.2V output
TP23 MCU_RESETn AM261x warm reset