SPRABJ8D September   2022  – May 2025 AM2612 , AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1 , AM263P2 , AM263P2-Q1 , AM263P4 , AM263P4-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Power
    1. 2.1 Discrete DC-DC Power Solution
    2. 2.2 Integrated PMIC Power Solution
    3. 2.3 Power Decoupling and Filtering
      1. 2.3.1 ADC/DAC Voltage Reference Decoupling
    4. 2.4 Estimated Power Consumption
    5. 2.5 Power Distribution Network
      1. 2.5.1 Simulations
        1. 2.5.1.1 Core Digital Power 1.2V
        2. 2.5.1.2 Digital and Analog I/O Power 3.3V
    6. 2.6 eFuse Power
  6. 3 Clocking
    1. 3.1 Crystal and Oscillator Input Options
    2. 3.2 Output Clock Generation
    3. 3.3 Crystal Selection and Shunt Capacitance
    4. 3.4 Crystal Placement and Routing
  7. 4 Resets
  8. 5 Bootstrapping
    1. 5.1 SOP Signal Implementation
  9. 6 OSPI and QSPI Memory Implementation
    1. 6.1 ROM OSPI and QSPI Boot Requirements
      1. 6.1.1 AM263x QSPI Boot Pin Requirements
      2. 6.1.2 AM263Px OSPI and QSPI Boot Pin Requirements
      3. 6.1.3 AM261x OSPI and QSPI Boot Pin Requirements
    2. 6.2 Additional OSPI and QSPI References
  10. 7 Debug Interfaces
    1. 7.1 JTAG Emulators and Trace
    2. 7.2 UART
  11. 8 USB
    1. 8.1 USB Device Mode
    2. 8.2 USB Host Mode
  12. 9 Multiplexed Peripherals
  13. 10Digital Peripherals
    1. 10.1 General Digital Peripheral Routing Guidelines
    2. 10.2 Trace Length Matching
  14. 11Analog Peripherals
    1. 11.1 General Analog Peripheral Routing Guidelines
      1. 11.1.1 Resolver ADC Routing Guidelines
  15. 12Layer Stackup
    1. 12.1 Key Stackup Features
  16. 13Vias
  17. 14BGA Power Fan-Out and Decoupling Placement
    1. 14.1 Ground Return
      1. 14.1.1 Ground Return - ZCZ Package AM26x Devices
      2. 14.1.2 Ground Return - ZNC and ZFG Package AM261x Devices
    2. 14.2 1.2V Core Digital Power
      1. 14.2.1 1.2V Core Digital Power Key Layout Considerations - ZCZ
      2. 14.2.2 1.2V Core Digital Power Key Layout Considerations - ZFG
    3. 14.3 3.3V Digital and Analog Power
      1. 14.3.1 3.3V I/O Power Key Layout Considerations - ZCZ
      2. 14.3.2 3.3V I/O Power Key Layout Considerations - ZFG
    4. 14.4 1.8V Digital and Analog Power
      1. 14.4.1 1.8V Key Layout Considerations - ZCZ
      2. 14.4.2 1.8V Key Layout Considerations - ZFG
  18. 15Summary
  19. 16References
  20. 17Revision History

2.4 Estimated Power Consumption

This section outlines the latest estimates of the AM263x, AM263Px, and AM261x peak power consumption on a per device power net basis. These values can change as more power modeling and characterization is performed. This data can be used to scale peak DC-DC conversion power margin, perform IR drop analysis of the PCB layout, and help with thermal loading analysis.

These estimates are based on initial power simulations of the device when operating at 150°C junction temperature. For the latest characterized, peak power numbers, see the specific AM26x device data sheet.

A use-case based power estimation tool (PET) is also provided for the AM26x MCUs. These tools can help further bound the peak power based on specific core and peripheral utilization duty-cycle. The device-specific PET can be downloaded from the AM263x, AM263Px, and AM261x product pages.

Table 2-10 Estimated Peak Power Consumption - Automotive-grade AM26x, R5F = 400MHz, 150°C Junction Temperature
Device
Supply Name		 Nominal
Voltage (V)		 AM263x
Peak Current (mA)		 AM263Px
Peak Current (mA)		 AM261x
Peak Current (mA)		 Supply Description
VDD + VDDARn 1.2 2500 2800 1750 Digital core power
VDDS33 3.3 200 200 3.3V IOs only(1) 200 3.3V digital I/O power
1.8Vand 3.3V IOs(2) 120
VDDA33 3.3 100 200 100 3.3V analog I/O power
(1) When all IOs are operating in the 3.3V domain
(2) When OSPI0 and OSPI1 IOs are operating in the 1.8V domain
Table 2-11 Estimated Peak Power Consumption - Industrial-grade AM261x, R5F = 500MHz, 125°C Junction Temperature
Device
Supply Name		 Nominal
Voltage (V)		 AM261x
Peak Current (mA)		 Supply Description
VDD + VDDARn 1.25 1500 Digital core power
VDDS33 3.3 3.3V IOs only(1) 200 3.3V digital I/O power
1.8Vand 3.3V IOs(2) 120
VDDA33 3.3 100 3.3V analog I/O power
(1) When all IOs are operating in the 3.3V domain
(2) When OSPI0 and OSPI1 IOs are operating in the 1.8V domain