SPRAC31 February   2019 TMS320C5505 , TMS320C5515 , TMS320C5535

 

  1.   TMS320C5505/15/35/45 schematic checklist
    1.     Trademarks
    2. 1 Introduction
      1. 1.1 Device Applicability
      2. 1.2 Links to TI Hardware Designs Based on C5505/15/35/45
        1. 1.2.1 C5505 eZdsp
        2. 1.2.2 C5515 eZdsp
        3. 1.2.3 C5515 EVM
        4. 1.2.4 C5535 eZdsp
        5. 1.2.5 C5535 Audio Capacitive Touch BoosterPack
        6. 1.2.6 C5545 BoosterPack (BOOST5545ULP)
      3. 1.3 EVM vs Data Sheet
    3. 2 Complimentary Resources
    4. 3 Recommendations Specific to C5504/05/14/15/32/33/34/35/45
      1. 3.1  Before You Begin
        1. 3.1.1 Documentation
        2. 3.1.2 Pin Out
      2. 3.2  Unused Pins
      3. 3.3  Unused Power Rails
        1. 3.3.1 If USB is not Used
        2. 3.3.2 If RTC is not Used
        3. 3.3.3 If EMIF is not Used (not applicable to C5532/33/34/35 or C5545)
        4. 3.3.4 If an On-Chip LDO Output is not Used
      4. 3.4  Clocking
      5. 3.5  OSC Internal Oscillator Clock Source
      6. 3.6  Power
        1. 3.6.1 CVDDRTC Must be Always Supplied - [0.998 V - 1.43 V]
        2. 3.6.2 LDOI Must be Always Supplied
        3. 3.6.3 On-Chip LDOs
        4. 3.6.4 Recommended PMIC
        5. 3.6.5 DVDDIO Supply ON While CVDD OFF
        6. 3.6.6 Power Sequencing
        7. 3.6.7 Voltage Rails of IO Pins
      7. 3.7  Decoupling Capacitors
      8. 3.8  LDO Output Decoupling Capacitors
      9. 3.9  Digital GND, Analog GND, Local GND
        1. 3.9.1 Recommended USB Supplies
      10. 3.10 Reset
      11. 3.11 USB
      12. 3.12 I2C
      13. 3.13 I2S
      14. 3.14 RTC
      15. 3.15 SAR ADC
      16. 3.16 Pin Muxing
      17. 3.17 Signal Visibility
      18. 3.18 EMIF (not applicable to C5532/33/34/35 or C5545)
      19. 3.19 JTAG
      20. 3.20 Bootloader
    5. 4 References

3.18 EMIF (not applicable to C5532/33/34/35 or C5545)

  • EMIF interfaces to both mSDRAM and SDRAM devices that meet the following requirements:

  • Non-mobile SDRAM can be supported under certain circumstances. The C5504/05/14/15 always use mobile SDRAM initialization but are able to support SDRAM memories that ignore the BA0 and BA1 pins for the load mode register command. During the mobile SDRAM initialization, the device issues the load mode register initialization command to two different addresses that differ in only the BA0 and BA1 address bits. These registers are the Extended Mode register and the Mode register. The extended mode register exists only in mSDRAM and not in non-mSDRAM. If a non-mobile SDRAM memory ignores bits BA0 and BA1, the second loaded register value overwrites the first, leaving the desired value in the mode register and the non-mobile SDRAM will work with the device.
  • Since the extended load mode register command always occurs before the standard load mode register command, as long as the non-mobile SDRAM ignores BA0 and BA1 during either command, the mode register will first be written to with incorrect (mobile SDRAM) data, then be overwritten with the correct (SDRAM) data.
  • MT48LC16M4A2 is an example of SDRAM that ignores BA0 and BA1 during the load mode register command
  • MT48H8M16LF is an example of mobile SDRAM that shows the extended load mode register command before the load mode register command, using BA0 and BA1 to differentiate between the two commands.

  • If EMIF is not used, see Section 3.3.3.

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