The memory address to branch upon booting on selecting flash boot mode or GPIOs used as part of a peripheral bootloader are predefined in ROM. This places constraints on hardware design while selecting pin functions if any specific pins are already used for peripheral bootloaders. Beginning with F2837xD devices, some additional peripheral GPIO mux options were provided to add more flexibility to the GPIOs used as part of the application. F28004x onwards, more of these expanded boot options have been added versus any other previous device. This includes multiple entry address options when booting to flash and multiple GPIO mux combinations for bootloader peripherals such as SCI, CAN, SPI, parallel and I2C. Using the expanded boot options is no different than setting any other boot mode in the custom table. First find the boot mode option with the associated value in the GPIO assignments section of the TRM and then set it in the 64-bit BOOTDEF memory location in user-configurable DCSM OTP.