SPRACU0 September   2020 DRA710 , DRA710 , DRA712 , DRA712 , DRA714 , DRA714 , DRA716 , DRA716 , DRA718 , DRA718 , DRA722 , DRA722 , DRA724 , DRA724 , DRA725 , DRA725 , DRA726 , DRA726 , DRA744 , DRA744 , DRA745 , DRA745 , DRA746 , DRA746 , DRA74P , DRA74P , DRA750 , DRA750 , DRA756 , DRA756 , DRA75P , DRA75P , DRA76P , DRA76P , DRA77P , DRA77P , DRA780 , DRA780 , DRA781 , DRA781 , DRA782 , DRA782 , DRA783 , DRA783 , DRA785 , DRA785 , DRA786 , DRA786 , DRA787 , DRA787 , DRA788 , DRA788 , DRA790 , DRA790 , DRA791 , DRA791 , DRA793 , DRA793 , DRA797 , DRA797 , TDA2EG-17 , TDA2EG-17 , TDA2HF , TDA2HF , TDA2HG , TDA2HG , TDA2HV , TDA2HV , TDA2LF , TDA2LF , TDA2P-ABZ , TDA2P-ABZ , TDA2P-ACD , TDA2P-ACD , TDA2SA , TDA2SA , TDA2SG , TDA2SG , TDA2SX , TDA2SX

 

  1.   Trademarks
  2. 1IVA-HD Share Problem in Current Use Cases
  3. 2IVA-HD Sharing Design
  4. 3IVA-HD Sharing Implementation
    1. 3.1 Boot Flow
    2. 3.2 IVA-HD DPLL Configure in uboot
    3. 3.3 Configure IPU to Support IPUMM and Decode Link at the Same Time
    4. 3.4 IVA-HD Configure
      1. 3.4.1 Codec Engine and IPUMM Setup
      2. 3.4.2 Framework Components
      3. 3.4.3 Codec
      4. 3.4.4 IVA-HD Boot Parameter
    5. 3.5 RPMSG Startup
  5. 4Early Decoding Demo
  6. 5References

3.1 Boot Flow

For PSDKLA + VISION-SDK architecture, early boot late-attach is often used. Figure 3-1 shows the boot flow.

GUID-20200825-CA0I-NXBN-RJSC-XXMNVQDTVKNH-low.gif Figure 3-1 Boot Flow

For PSDKLA, IVA-HD's clock and power is controlled by kernel. For VISOIN-SDK, IVA-HD is configured by using IPU. Use the following boot flow to solve the resource conflicts.

  1. IVA-HD DPLL configure in u-boot
  2. Configure IPU to support IPUMM and decode link at the same time
  3. IVA-HD configure
    1. Codec engine and IPUMM setup
    2. Framework components
    3. Codec
    4. IVA-HD boot parameter
  4. RPMSG Driver configure