SPRUJ40C may   2022  – may 2023

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1EVM Revisions and Assembly Variants
  5. 2System Description
    1. 2.1 Key Features
      1. 2.1.1 Thermal Compliance
      2. 2.1.2 Processor
      3. 2.1.3 Power Supply
      4. 2.1.4 Memory
      5. 2.1.5 JTAG/Emulator
      6. 2.1.6 Supported Interfaces and Peripherals
      7. 2.1.7 Expansion Connectors/Headers to Support Application Specific Add‐On Boards
    2. 2.2 Functional Block Diagram (SK-AM62 and SK-AM62B)
    3. 2.3 Functional Block Diagram (SK-AM62-P1 and SK-AM62B-P1)
    4. 2.4 AM62x SKEVM Interface Mapping
    5. 2.5 Power ON/OFF Procedures
      1. 2.5.1 Power-On Procedure
      2. 2.5.2 Power-Off Procedure
      3. 2.5.3 Power Test Points
    6. 2.6 Peripheral and Major Component Description
      1. 2.6.1  Clocking
        1. 2.6.1.1 Peripheral Ref Clock
      2. 2.6.2  Reset
      3. 2.6.3  OLDI Display Interface
      4. 2.6.4  CSI Interface
      5. 2.6.5  Audio Codec Interface
      6. 2.6.6  HDMI Display Interface
      7. 2.6.7  JTAG Interface
      8. 2.6.8  Test Automation Header
      9. 2.6.9  UART Interface
      10. 2.6.10 USB Interface
        1. 2.6.10.1 USB 2.0 Type A Interface
        2. 2.6.10.2 USB 2.0 Type C Interface
      11. 2.6.11 Memory Interfaces
        1. 2.6.11.1 DDR4 Interface
        2. 2.6.11.2 OSPI Interface
        3. 2.6.11.3 MMC Interfaces
          1. 2.6.11.3.1 MMC0 - eMMC Interface
          2. 2.6.11.3.2 MMC1 - Micro SD Interface
          3. 2.6.11.3.3 MMC2 - Wilink Interface
        4. 2.6.11.4 EEPROM
      12. 2.6.12 Ethernet Interface
        1. 2.6.12.1 CPSW Ethernet PHY 2 Default Configuration
        2. 2.6.12.2 CPSW Ethernet PHY 1 Default Configuration
      13. 2.6.13 GPIO Port Expander
      14. 2.6.14 GPIO Mapping
      15. 2.6.15 Power
        1. 2.6.15.1 Power Requirements
        2. 2.6.15.2 Power Input
        3. 2.6.15.3 Power Supply
        4. 2.6.15.4 Power Sequencing
        5. 2.6.15.5 AM62x SoC Power
        6. 2.6.15.6 Current Monitoring
      16. 2.6.16 AM62x SKEVM User Setup/Configuration
        1. 2.6.16.1 EVM DIP Switches
        2. 2.6.16.2 Boot Modes
        3. 2.6.16.3 User Test LEDs
      17. 2.6.17 Expansion Headers
        1. 2.6.17.1 PRU Connector
        2. 2.6.17.2 User Expansion Connector
        3. 2.6.17.3 MCU Connector
      18. 2.6.18 Interrupt
      19. 2.6.19 I2C Address Mapping
  6. 3Known Issues and Modifications
    1. 3.1  Issue 1 - HDMI/DSS Incorrect Colors on E1
    2. 3.2  Issue 2 - J9 and J10 Header Alignment on E1
    3. 3.3  Issue 3 - USB Boot descoped on E1
    4. 3.4  Issue 4 - OLDI Connector Orientation and Pinout
    5. 3.5  Issue 5 - Bluetooth descoped on E2 EVMs
    6. 3.6  Issue 6 - Ethernet PHY CLK Skew Default Strapping Changes
    7. 3.7  Issue 7 - TEST_POWERDOWN changes
    8. 3.8  Issue 8 - MMC1_SDCD spurious interrupts
    9. 3.9  Issue 9 - PD Controller I2C2 IRQ Not Pinned Out
    10. 3.10 Issue 10 - INA Current Monitor Adress Changes
    11. 3.11 Issue 11 - Test Automation I2C Buffer Changes
  7.   Regulatory Compliance
  8.   Revision History

2.6.17.2 User Expansion Connector

The AM62x SKEVM supports RPi expansion interface using a 40-pin User expansion connector Mfr. Part# PEC20DAAN. Four mounting holes must be oriented with the connector to allow for connection of these boards.

Following interfaces and IOs shall be included on to the 40 pin User Expansion connector.

  • 2x SPI : SPI0 with 2 CS and SPI2 with 3 CS
  • 2x I2C: SoC_I2C0 and SoC_I2C2
  • 1x UART: UART5
  • 2x PWM: EHRPWM0_A, EHRPWM1_B
  • 1x CLK: CLKOUT0
  • 9x GPI0: GPIOs from main domain
  • 5V and 3.3V supply (current limited to 155mA and 500mA)

Each of the power supplies 5 V and 3.3 V are current limited to 155 mA and 500 mA, respectively. This is achieved by using two individual load switch TPS22902YFPR and TPS22946YZPR. Enable for the load switches is driven by I2C based GPIO Port expander.

Signals routed from User Expansion connector are listed in Table 2-25.

Table 2-25 40 Pin User Expansion Connector
Pin No. SoC Ball Net Name Pin Multiplexed Signals
1 - VCC3V3_EXP
2 - VCC5V0_EXP
3 K24 SoC_I2C2_SDA GPMC0_CSN3/ GPMC0_A20/ UART4_TXD/ MCASP1_AXR5/ TRC_DATA18/ GPIO0_44/ MCASP1_ACLKR
4 - VCC5V0_EXP
5 K22 SoC_I2C2_SCL GPMC0_CSN2/ MCASP1_AXR4/ UART4_RXD/ PR0_PRU0_GPO19/ PR0_PRU0_GPI19/ TRC_DATA17/ GPIO0_43/ MCASP1_AFSR
6 - DGND
7 A18 EXP_CLKOUT0 EXT_REFCLK1/ SYNC1_OUT/ SPI2_CS3/ SYSCLKOUT0/ TIMER_IO4/ CLKOUT0/ CP_GEMAC_CPTS0_RFT_CLK/ GPIO1_30/ ECAP0_IN_APWM_OUT
8 E15 EXP_UART5_TXD UART5_TXD/ TIMER_IO3/ SYNC3_OUT/ UART1_RIn/ EQEP2_S/ PR0_UART0_TXD/ GPIO1_25/ MCASP2_AXR1/ EHRPWM_TZn_IN4
9 - DGND
10 C15 EXP_UART5_RXD UART5_RXD/ TIMER_IO2/ SYNC2_OUT/ UART1_DTRn/ EQEP2_I/ PR0_UART0_RXD/ GPIO1_24/ MCASP2_AXR0/ EHRPWM_TZn_IN3
11 B20 EXP_SPI2_CS1 MCASP0_ACLKX/ SPI2_CS1/ ECAP2_IN_APWM_OUT/ GPIO1_11/ EQEP1_A
12 E19 EXP_SPI2_CS0/EHRPWM0_A MCASP0_AFSR/ SPI2_CS0/ UART1_RXD/ EHRPWM0_A/ GPIO1_13/ EQEP1_S
13 L21 EXP_GPIO0_42 GPMC0_CSn1/ PR0_PRU1_GPO16/ PR0_PRU1_GPI16/ MCASP2_AXR15/ PR0_PRU0_GPO18/ PR0_PRU0_GPI18/ TRC_DATA16/ GPIO0_42
14 - DGND
15 L23 EXP_GPIO0_32 GPMC0_ADVn_ALE/ MCASP1_AXR2/ PR0_PRU0_GPO9/ PR0_PRU0_GPI9/ TRC_DATA7/ GPIO0_32
16 V25 EXP_GPIO0_38 GPMC0_WAIT1/ VOUT0_EXTPCLKIN/ GPMC0_A21/ UART6_RXD/ GPIO0_38/ EQEP2_I
17 - VCC3V3_EXP
18 K25 EXP_GPIO0_39 GPMC0_WPn/ AUDIO_EXT_REFCLK1/ GPMC0_A22/ UART6_TXD/ PR0_PRU0_GPO15/ PR0_PRU0_GPI15/ TRC_DATA13/ GPIO0_39
19 B13 EXP_SPI0_D0 SPI0_D0/ CP_GEMAC_CPTS0_HW1TSPUSH/ EHRPWM1_B/ GPIO1_18
20 - DGND
21 B14 EXP_SPI0_D1 SPI0_D1/ CP_GEMAC_CPTS0_HW2TSPUSH/ HRPWM_TZn_IN0/ GPIO1_19
22 E24 EXP_GPIO0_14 OSPI0_CSn3/ OSPI0_RESET_OUT0/ OSPI0_ECC_FAIL/ MCASP1_ACLKR/ MCASP1_AXR3/ UART5_TXD/ GPIO0_14
23 A14 EXP_SPI0_CLK SPI0_CLK/ CP_GEMAC_CPTS0_TS_SYNC/ EHRPWM1_A/ GPIO1_17
24 A13 EXP_SPI0_CS0 SPI0_CS0/ EHRPWM0_A/ PR0_ECAP0_SYNC_IN/ GPIO1_15
25 - DGND
26 C13 EXP_SPI0_CS1 SPI0_CS1/ CP_GEMAC_CPTS0_TS_COMP/ EHRPWM0_B/ ECAP0_IN_APWM_OUT/ GPIO1_16/ EHRPWM_TZn_IN5
27 A16 SoC_I2C0_SDA I2C0_SDA/ PR0_IEP0_EDIO_DATA_IN_OUT31/ SPI2_CS2/ TIMER_IO5/ UART1_DSRn/ EQEP2_B/ EHRPWM_SOCB/ GPIO1_27/ ECAP2_IN_APWM_OUT
28 B16 SoC_I2C0_SCL I2C0_SCL/ PR0_IEP0_EDIO_DATA_IN_OUT30/ SYNC0_OUT/ OBSCLK0/ UART1_DCDn/ EQEP2_A EHRPWM_SOCA/ GPIO1_26/ ECAP1_IN_APWM_OUT / SPI2_CS0
29 N20 EXP_GPIO0_36 GPMC0_BE1n/ MCASP2_AXR12/ PR0_PRU0_GPO13/ PR0_PRU0_GPI13/ TRC_DATA11/ GPIO0_36
30 - DGND
31 L24 EXP_GPIO0_33 GPMC0_OEn_REn/ MCASP1_AXR1/ PR0_PRU0_GPO10/ PR0_PRU0_GPI10/ TRC_DATA8/ GPIO0_33
32 M22 EXP_GPIO0_40/
PR0_ECAP0_IN_APWM_OUT		 GPMC0_DIR/ PR0_ECAP0_IN_APWM_OUT/ MCASP2_AXR13/ PR0_PRU0_GPO16/ PR0_PRU0_GPI16/ TRC_DATA14/ GPIO0_40/ EQEP2_S
33 E18 EXP_EHRPWM1_B MCASP0_AXR0/ PR0_ECAP0_IN_APWM_OUT/ AUDIO_EXT_REFCLK0/ PR0_UART0_TXD/ EHRPWM1_B/ GPIO1_10/ EQEP0_I
34 - DGND
35 A19 EXP_SPI2_D1/
ECAP2_IN_APWM_OUT		 MCASP0_AXR2/ SPI2_D1/ UART1_RTSn/ UART6_TXD/ PR0_IEP0_EDIO_DATA_IN_OUT29/ ECAP2_IN_APWM_OUT/ PR0_UART0_TXD/ GPIO1_8/ EQEP0_B
36 B18 EXP_SPI2_CS2 MCASP0_AXR1/ SPI2_CS2/ ECAP1_IN_APWM_OUT/ PR0_UART0_RXD/ EHRPWM1_A/ GPIO1_9/ EQEP0_S
37 M21 EXP_GPIO0_41 GPMC0_CSn0/ MCASP2_AXR14/ PR0_PRU0_GPO17/ PR0_PRU0_GPI17/ TRC_DATA15/ GPIO0_41
38 B19 EXP_SPI2_D0 MCASP0_AXR3/ SPI2_D0/ UART1_CTSn/ UART6_RXD/ PR0_IEP0_EDIO_DATA_IN_OUT28/ ECAP1_IN_APWM_OUT/ PR0_UART0_RXDGPIO1_7 EQEP0_A
39 - EXP_HAT_DETECT
40 A20 EXP_SPI2_CLK MCASP0_ACLKR/ SPI2_CLK/ UART1_TXD/ EHRPWM0_B/ GPIO1_14/ EQEP1_I