SPRUJH3 April   2025 TMS320F2800132 , TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280023 , TMS320F280023C , TMS320F280025 , TMS320F280025C , TMS320F280034 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037C , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039C , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041C , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049C , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377S , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379S , TMS320F28384D , TMS320F28384S , TMS320F28386D , TMS320F28386S , TMS320F28388D , TMS320F28388S , TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SG-Q1 , TMS320F28P559SJ-Q1 , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Configuring the Boot Mode
    1. 2.1 Standalone Boot
      1. 2.1.1 Boot Mode Select Pins (BMSP)
      2. 2.1.2 Boot Definition Table (BOOTDEF)
      3. 2.1.3 Boot ROM OTP Configuration Registers
      4. 2.1.4 CPU2 Boot Flow
    2. 2.2 Emulation Boot
  6. 3Programming the Flash
    1. 3.1 Flash API
    2. 3.2 Flash Kernels
  7. 4Bootloading Code to Flash
    1. 4.1 C2000 Hex Utility
    2. 4.2 Common Boot Modes
      1. 4.2.1 Boot to Flash
      2. 4.2.2 SCI Boot
      3. 4.2.3 CAN Boot
      4. 4.2.4 CAN-FD Boot
      5. 4.2.5 USB Boot
  8. 5FAQ
    1. 5.1 Selecting the BMSP GPIOs with a Software-based Implementation
    2. 5.2 Running a Flash Kernel from the Flash Instead of the RAM
    3. 5.3 No Symbols Defined When Debugging Boot ROM
    4. 5.4 Writing Values in the OTP Using the On-Chip Flash Tool
    5. 5.5 Writing Values in the OTP Using the Flash API Plugin
  9. 6Summary
  10. 7References

4.2.1 Boot to Flash

Note: Although these steps were conducted on an F2800157 LaunchPad, the general flow can be easily applied to any C2000 devices that support custom BMSPs and boot definition tables (all devices provided in Table 2-3). Refer to the device-specific TRM for details for the device that is intended to boot load on.

If the user needs to boot to code already programmed in the on-chip flash, then users can either use the default BMSPs to boot to flash entry point address 0x0008 0000, or configure the BOOTPIN-CONFIG and BOOTDEF registers to boot to a specific flash address.

Note: Certain devices feature a secure flash boot option present on devices that can be used to perform an application boot from flash with an additional security layer of boot code authentication before the actual code execution. Please refer to Secure BOOT on C2000 Device [13] for the general procedure of enabling a secure boot. Users can verify the availability of the secure flash boot feature in the device-specific TRM.

The default BMSPs to configure boot to flash can be found in the TMS320F280015x Real-Time Microcontrollers data sheet. If the user sets both GPIO24 and GPIO32 to 1, then the boot ROM branches to flash entry address 0x0008 0000 without needing to configure the device registers.

However, if users need to boot to a different flash sector, then the BOOTCONFIG and BOOTDEF registers need to be configured for the specific boot option. Refer to the GPIO Assignments section in the data sheet to find which boot option to configure to reach the intended flash entry point. These steps describe how to emulate boot to flash entry point 0x0009 0000. For example, boot option 0x63.

Note: An application can be loaded into different flash locations by using linker command files. Refer to the Compiler Tools User Manual description on Linker Command Files [12] for details on how to load code into a particular flash address.
  1. Open CCS to a workspace.
  2. Select View > Target Configurations.

    Opening the Target Configuration Menu in CCS

    Figure 4-2 Opening the Target Configuration Menu in CCS
  3. Users can import a project for this device to CCS and use that to connect to the device, or copy the target configuration file (.ccxml) from C2000Ware (C2000Ware_x_xx_xx_xx > device_support > DEVICE_FAMILY > common > targetConfigs) to the User Defined target configurations.
    1. Find the device target config and then manually launch by right clicking.

      Launching a Target Configuration in CCS

      Figure 4-3 Launching a Target Configuration in CCS
  4. When CCS brings up the debug window, select the intended CPU and connect to the target.

    Connecting to the Target Core in CCS

    Figure 4-4 Connecting to the Target Core in CCS
  5. If a window pops up stating there is a break in the boot ROM with no debug information available, or outside of program code, then follow Section 5.3 to debug the boot ROM.
  6. Once the symbols are loaded, open the memory browser by going to View > Memory Browser.

    Navigating to the Memory Browser in CCS
    Figure 4-5 Navigating to the Memory Browser in CCS
  7. In the memory browser tab, navigate to address 0xD00. Recall that the 0xD00 location specifies the BMSPs with the validity key (EMU-BOOTPIN-CONFIG) and 0xD04-0xD05 specifies the boot definitions (EMU-BOOTDEF-LOW).
  8. The objective is to configure a zero-pin boot to flash address 0x0009 0000, so all BMSPs need to disabled and the EMU-BOOTDEF-LOW needs to be set to 0x63 in the lowest index. If the boot option is programmed to any other entry in EMU-BOOTDEF-LOW, then the intended boot mode is not selected.
    1. Set 0xD00-0xD01 (EMU-BOOTPIN-CONFIG) to 0x5AFF FFFF.
    2. Set 0xD04 (EMU-BOOTDEF-LOW) to 0x0063.
      Note: Zero-pin boot means that the device automatically boots to the first entry defined the BOOTDEF table. This is achieved by disabling all BMSPs, thus allowing the device to only consider one boot option.

    Emulating a Zero-pin Boot to Flash (0x0009 0000)
    Figure 4-6 Emulating a Zero-pin Boot to Flash (0x0009 0000)
  9. Reset the CPU and perform an external reset (XRSn). Then, click on Resume to begin the boot sequence.
  10. Now, the device boots to flash address 0x0009 0000 on reset, as specified by boot option 0x63.