SPRUJH3 April   2025 TMS320F2800132 , TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280023 , TMS320F280023C , TMS320F280025 , TMS320F280025C , TMS320F280034 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037C , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039C , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041C , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049C , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377S , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379S , TMS320F28384D , TMS320F28384S , TMS320F28386D , TMS320F28386S , TMS320F28388D , TMS320F28388S , TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SG-Q1 , TMS320F28P559SJ-Q1 , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Configuring the Boot Mode
    1. 2.1 Standalone Boot
      1. 2.1.1 Boot Mode Select Pins (BMSP)
      2. 2.1.2 Boot Definition Table (BOOTDEF)
      3. 2.1.3 Boot ROM OTP Configuration Registers
      4. 2.1.4 CPU2 Boot Flow
    2. 2.2 Emulation Boot
  6. 3Programming the Flash
    1. 3.1 Flash API
    2. 3.2 Flash Kernels
  7. 4Bootloading Code to Flash
    1. 4.1 C2000 Hex Utility
    2. 4.2 Common Boot Modes
      1. 4.2.1 Boot to Flash
      2. 4.2.2 SCI Boot
      3. 4.2.3 CAN Boot
      4. 4.2.4 CAN-FD Boot
      5. 4.2.5 USB Boot
  8. 5FAQ
    1. 5.1 Selecting the BMSP GPIOs with a Software-based Implementation
    2. 5.2 Running a Flash Kernel from the Flash Instead of the RAM
    3. 5.3 No Symbols Defined When Debugging Boot ROM
    4. 5.4 Writing Values in the OTP Using the On-Chip Flash Tool
    5. 5.5 Writing Values in the OTP Using the Flash API Plugin
  9. 6Summary
  10. 7References

2.1.2 Boot Definition Table (BOOTDEF)

When BMSPs are configured in the OTP, a custom boot mode table must also be defined by writing to the boot definition table registers (BOOTDEF) with boot option entries. Replacing the default boot mode selection table, the user-defined BOOTDEF table is indexed using the customized BMSPs in the OTP. For example, instead of parallel boot being tied to boot option 0 in the default configuration, the user can now set the first boot option to any available boot mode, and so on.

The BOOTDEF table is set up by configuring a 64-bit register (see Table 2-5), split into two 32-bit wide locations in the DCSM OTP, called Z1-OTP-BOOTDEF-LOW and Z1-OTP-BOOTDEF-HIGH (or Z2-OTP-BOOTDEF-LOW and Z2-OTP-BOOTDEF-HIGH depending on which zone is configured). These registers are then partitioned into 8-bit wide entries, defining each boot option to be used.

The range of customizable boot modes in the BOOTDEF table depends on how many BMSPs are being used. Recall, zero BMSPs allows for one table entry, one BMSP allows up to two table entries, two BMSPs allows up to four table entries, and three BMSPs allows up to eight table entries.

To configure the BOOTDEF table:
  1. Select a boot option in the GPIO Assignments section of the data sheet or Technical Reference Manual
  2. Set the associated BOOTDEF value of the boot option in the intended BOOTDEF-LOW or BOOTDEF-HIGH OTP memory location.

The BOOTDEF registers in the DCSM OTP can be programmed using the On-Chip Flash tool in CCS or Flash API (see Section 5.4 or Section 5.5 respectively for steps), or graphically with the DCSM tool in SysConfig [8].

Once programmed with valid BOOTDEFs, the boot definition table can be indexed with the BMSPs configured in the BOOTPIN-CONFIG register to select which boot option is executed in the boot ROM on reset.

Table 2-5 BOOTDEF Bit Fields
BOOTDEF Name Byte Position Name Description
BOOT_DEF0 7:0 [3:0] BOOT_DEF0 Mode Set the boot mode number from Table 2-6. Any unsupported boot mode causes the device to either go to wait boot (debugger connected) or boot to Flash (standalone).
[7:4] BOOT_DEF0 Options Set alternate/additional boot options. This can include changing the GPIOs for a particular boot peripheral or specifying a different Flash entry point. Refer to GPIO Assignments for valid BOOTDEF values to set in the table.
BOOT_DEF1 15:8 BOOT_DEF1 Mode/Options Refer to BOOT_DEF0 description.
BOOT_DEF2 23:16 BOOT_DEF2 Mode/Options
BOOT_DEF3 31:24 BOOT_DEF3 Mode/Options
BOOT_DEF4 39:32 BOOT_DEF4 Mode/Options
BOOT_DEF5 47:40 BOOT_DEF5 Mode/Options
BOOT_DEF6 55:48 BOOT_DEF6 Mode/Options
BOOT_DEF7 63:56 BOOT_DEF7 Mode/Options
Table 2-6 F280015x Device Boot Modes
Boot Number Boot Mode
0 Parallel
1 SCI/Wait
2 CAN
3 Flash
4 Wait
5 RAM
6 SPI
7 I2C
8 CAN-FD
10 Secure Flash
Note:

There are exceptions to the configurability of the boot selection table depending on the device family:

  1. On F2833x devices, the boot table is not customizable and restricted to the factory default
  2. On F2802x, F2803x, F2806x, F2837xD, F2837xS, and F2807x, the boot table is semi-customizable, as the 4th entry in the default boot table (GET mode) can be programmed to one additional boot mode

This is different from devices that use the BOOTDEF register (see Table 2-3), allowing for up to eight boot modes to be selected. Please see the device-specific TRM for more details on BOOTCTRL.