SPRZ572A
April 2024 – September 2024
TMS320F28P550SJ
,
TMS320F28P559SJ-Q1
1
TMS320F28003x Real-Time MCUs Silicon ErrataSilicon Revision 0
1
Usage Notes and Advisories Matrices
1.1
Usage Notes Matrix
1.2
Advisories Matrix
2
Nomenclature, Package Symbolization, and Revision Identification
2.1
Device and Development-Support Tool Nomenclature
2.2
Devices Supported
2.3
Package Symbolization and Revision Identification
3
Silicon Revision A Usage Notes and Advisories
3.1
Silicon Revision A Usage Notes
3.1.1
PIE: Spurious Nested Interrupt After Back-to-Back PIEACK Write and Manual CPU Interrupt Mask Clear
3.1.2
Caution While Using Nested Interrupts
3.1.3
Security: The primary layer of defense is securing the boundary of the chip, which begins with enabling JTAGLOCK and Zero-pin Boot to Flash feature
3.2
Silicon Revision A Advisories
Advisory
Advisory
Advisory
Advisory
Advisory
3.2.1
Advisory
Advisory
3.2.2
Advisory
Advisory
3.2.3
Advisory
Advisory
Advisory
3.2.4
Advisory
Advisory
Advisory
Advisory
Advisory
Advisory
4
Silicon Revision 0 Usage Notes and Advisories
4.1
Silicon Revision 0 Usage Notes
4.2
Silicon Revision 0 Advisories
Advisory
Advisory
Advisory
Advisory
4.2.1
Advisory
5
Documentation Support
6
Trademarks
7
Revision History
Errata
TMS320F28P55x Real-Time MCUs Silicon Errata
Silicon Revisions A, 0