SSZTA13 july   2017 TPS7A8300 , TPS7A91


  1.   1
  2.   2
    1.     3
    2.     What Is a Feed-forward Capacitor?
    3.     Improved Noise
    4.     Improved Stability and Transient Response
    5.     Improved PSRR
    6.     Conclusion
    7.     Additional Resources

Aaron Paxton

This article was updated March 22, 2022 by Kyle Van Renterghem.

In the article, LDO basics: noise: – How a noise reduction pin improves system performance, I discussed how to lower output noise and control the slew rate by using a capacitor in parallel with the reference voltage (CNR/SS). For this article, let’s discuss another method to lower output noise: using a feed-forward capacitor (CFF).

What Is a Feed-forward Capacitor?

A feed-forward capacitor is an optional capacitor placed in parallel with the top resistor of the resistor divider, as shown in Figure 1.

GUID-C0CD43E7-D4CE-404C-8E2F-9470EB2318FD-low.png Figure 1 A Low-dropout Regulator (LDO) Using a Feed-forward Capacitor

Much like the noise-reduction capacitor (CNR/SS), adding a feed-forward capacitor has multiple effects. These effects include improved noise, stability, load response and the power-supply rejection ratio (PSRR). The application report, “Pros and Cons of Using a Feedforward Capacitor with a Low-Dropout Regulator,” covers these benefits extensively. It’s also worth noting that a feed-forward capacitor is only viable when using an adjustable LDO because the resistor network is external.

Improved Noise

As part of the voltage regulation control loop, the error amplifier of the LDO uses the resistor network (R1 and R2) to increase the gain of the reference voltage, similar to a noninverting amplifier circuit that drives the gate of the field-effect transistor so that VOUT = VREF × (1 + R1/R2). This increase means that the DC voltage of the reference will be gained up by a factor of 1 + R1/R2. Within the bandwidth of the error amplifier, the AC elements (such as noise) of the reference voltage are gained up as well.

By adding a capacitor across the top resistor (CFF), you are introducing an AC shunt for a particular range of frequencies. In other words, you are keeping the AC elements in that frequency range within unity gain. Keep in mind that the impedance properties of the capacitor you’re using will determine this frequency range.

Figure 2 illustrates the reduction in noise of the TPS7A91 by using different CFF values.

GUID-DE183391-DC03-45E3-BDCA-0ABE7CB5CB9C-low.png Figure 2 TPS7A91 Noise vs. Frequency and CFF Values

By adding a 100-nF capacitor across the top resistor, you can reduce the noise from 9 μVRMS to 4.9 μVRMS.

Improved Stability and Transient Response

Adding a CFF also introduces a zero (ZFF) and pole (PFF) into the LDO feedback loop, calculated with Equations 1 and 2:

ZFF = 1 / (2 × π × R1 × CFF)                       (1)

PFF = 1 / (2 × π × R1 // R2 × CFF)               (2)

Placing the zero before the frequency where unity gain occurs improves the phase margin, as shown in Figure 3.

GUID-07967764-A853-4F9E-AE10-7FA80E7A697D-low.png Figure 3 Gain/phase Plot for a Typical LDO Using Only Feed-forward Compensation

You can see that without ZFF, unity gain would occur earlier, around 200 kHz. By adding the zero, the unity-gain frequency pushes a little to the right at approximately 300 kHz, but the phase margin also improves. Since PFF is to the right of the unity-gain frequency, its effect on the phase margin will be minimal.

The additional phase margin will be evident in the improved load transient response of the LDO. By adding phase margin, the LDO output will ring less and settle quicker.

Improved PSRR

Depending on the placement of the zero and pole, you can also strategically lessen the gain rolloff. Figure 3 shows the effect of the zero on gain rolloff starting at 100 kHz. By increasing the gain in the frequency band, you will also improve the loop response for that band, which will lead to improvements in PSRR for that particular frequency range. See Figure 4.

GUID-DB2F8076-92C6-419E-B4EC-80F56E8D3255-low.png Figure 4 TPS7A8300 PSRR vs. Frequency and CFF Values

As you can see, increasing the CFF capacitance pushes the zero leftward, which will lead to a better loop response and corresponding PSRR at a lower frequency range.

Of course, you must choose the value of CFF and the corresponding placement of ZFF and PFF to avoid introducing instability. You can prevent instability by following the CFF limits prescribed in the data sheet, though TI generally recommends selecting a value between 10 nF and 100 nF. A large CFF can introduce other challenges outlined in the pros and cons application report mentioned earlier.

Table 1 lists some rules of thumb regarding how CNR and CFF affect noise.

Table 1 Benefits of CNR And CFF Vs. Frequency
Parameter Noise
Low frequency(<1kHz) Mid frequency(1kHz-100kHz) High frequency(>100kHz)
Noise-reduction capacitor(CNR) +++ + No effect
Feed-forward capacitor (CFF) + +++ +


Adding a feed-forward capacitor can lead to improvements in noise, stability, load response and PSRR. Of course, you must carefully select the capacitor to maintain stability. When coupled with a noise-reduction capacitor, it becomes possible to greatly improve AC performance. These are a just few tools to keep in mind for optimizing your power supply.

Additional Resources