Usman Chaudhry

Today, designers are demanding an overall form-factor reduction – to save board space, increase functionality, and allocate more real estate toward end-user applications – all with less space allocated to power management, which requires not just X-Y shrink but 3-D volumetric shrink. In wearable products, the semiconductor industry has recently seen an increase in the use of system-in-package (SiP) technology for users who want simpler, more flexible designs and yet need to fulfill challenging space requirements. I expect to see this trend continue.

In fact, TI has more than 200 power modules for a full range of applications to address a broad market. SiP packaging technology is easy to use and comes with a number of performance benefits, including excellent thermal characteristics and minimized electromagnetic interference (EMI). But what truly sets TI’s SiPs apart is the use of 3-D packaging, which involves mounting components on top of each other inside the package. For space-conscious applications, 3-D packaging has given power modules a higher power density and significant form-factor reduction, saving board space, optimizing the overall printed circuit board (PCB) footprint, and supporting the industry trend toward miniaturization.

Additionally, 3-D packaging reduces volumetric requirements by placing the large inductor over the rest of the power-module circuitry, optimizing space. It also improves electrical performance by bringing passive components closer to the active controller device, reducing the total signal length. To support different industry needs, simplify designs, and increase volumetric power density, TI uses advanced 3-D construction techniques, resulting in a broad SiP packaging portfolio.

In quad flat pack no-lead (QFN) packages, one 3-D construction technique employs a stilted (raised) inductor technology, with the inductor placed over the integrated circuit (IC) package (see Figure 1). Using package-in-package 3-D technology and relatively simple manufacturing processes, QFN SiPs exhibit excellent thermal capability and simple pinout, making them easy to use. QFN modules are very popular in industrial, communications and enterprise markets.

Another great use of 3-D packaging is embedding active die inside laminate substrates and placing passives on top of the laminate. An example is the MicroSiP module, a tiny module that occupies very little board space and has industry-leading current density (see Figure 2). MicroSiP is perfect for miniaturized systems like those found in wearable and personal electronics.

There is also the very innovative yet easy-to-use transistor outline (TO) package power module that takes advantage of 3-D packaging. TO modules have dual lead frames with active die and passives placed on either side of the lead frame for a 3-D-leaded package-based SiP module solution that takes up little board space. TOs are great for industrial systems that operate under harsh conditions. TO package power-module external leads make the assembly process and mounting very easy for power supplies, especially for assembly sites that do not have advanced manufacturing capabilities.

If you’d like to learn more about power and 3-D packaging expertise, including the TO and QFN packaging of SiP power modules, check out our new white paper, “Powerful solutions come in small packages.” It explores how SiP modules help increase power density, speed time to market, and advance applications from industrial and communications to enterprise and personal electronics.