SWRU630A December   2024  – November 2025 AWRL6844 , IWRL6844

 

  1.   1
  2.   Description
  3.   Getting Started
  4.   Features
  5. 1xWRL6844EVM Revision history
  6. 2Evaluation Module Overview
    1. 2.1 Introduction
    2. 2.2 Key Features
    3. 2.3 Kit Contents
    4. 2.4 Specification
    5. 2.5 Device Information
  7. 3Hardware
    1. 3.1  xWRL6844EVM Antenna
      1. 3.1.1 PCB Material
        1. 3.1.1.1 Transmitter and Receiver Virtual Array
        2. 3.1.1.2 Phase summary of xWRL6844 Device + Antenna combined
    2. 3.2  EVM Mux Block Diagram
    3. 3.3  Switch Settings
    4. 3.4  Push Button Switches
    5. 3.5  LEDs
    6. 3.6  DC Input Jack
    7. 3.7  USB Connector
    8. 3.8  DCA1000 HD Connector
    9. 3.9  BoosterPack Connector for LaunchPad Connectivity
    10. 3.10 CAN-FD_B Connector
    11. 3.11 CAN-FD_A Connector
    12. 3.12 LIN-PHY Connector
    13. 3.13 I2C Connections
      1. 3.13.1 EEPROM
    14. 3.14 XDS110 Interface
    15. 3.15 FTDI Interface
    16. 3.16 DCA1000EVM Mode
    17. 3.17 PCB Storage and Handling Recommendations:
      1. 3.17.1 PCB Storage and Handling Recommendations
      2. 3.17.2 Higher Power Demanding Applications
  8. 4Software, Development Tools, and Example Code
    1. 4.1 Low Power mode implementation
  9. 5Hardware Design Files
    1. 5.1 Schematics, PCB Layout and Bill of Materials (BOM)
    2. 5.2 EVM Design Database
    3. 5.3 Hardware Design Checklist
  10. 6Additional Information
    1. 6.1 Trademarks
  11. 7References
    1. 7.1 TI E2E Community
  12. 8Revision History

3.3 Switch Settings

The Figure 3-10 shows the part designators and positions of the switches on xWRL6844EVM for different SOP mode settings. Table 3-3 shows the different boot mode configurations for the device. xWRL6844 supports Application mode/ Functional mode, Device management mode/ QSPI flashing mode, and Debug modes. The mode (SOP) configurations shown below Table 3-3 must be exercised first. After the correct SOP mode is set, an nRESET must be issued to register the SOP setting. In the Figure 3-10 the current SOP mode shown is Debug mode.

AWRL6844EVM IWRL6844EVM SOP switches (S7, S8) Figure 3-10 SOP switches (S7, S8)
Table 3-2 SOP settings
SOP Mode PMIC_CLK_OUT, TDO Combinations SOP1(S8), SOP0(S7)
SOP_MODE1 Device Management Mode/ QSPI Flashing Mode 00
SOP_MODE2 Application mode/ Functional Mode 01
SOP_MODE4 Debug Mode/ Development Mode 11

The S1 and S4 slide switches allows user connect to the digital interfaces from different peripherals

AWRL6844EVM IWRL6844EVM Slide Switch (S1) Figure 3-11 Slide Switch (S1)
Table 3-3 S1 Switch Settings
Reference Designator Switch OFF Switch ON
S1.1 CAN PHY B: Stand by Mode Disable CAN PHY B: Stand by Mode Enable
S1.2 XDS_RS232 FTDI_DCA_LP/BP_RS232
S1.3 FTDI_RS232 DCA_LP/BP_RS232
S1.4 CAN_FD_A XDS_DCA_LP/BP_FTDI_UARTA
S1.5 DCA_LP/BP_FTDI_UARTA XDS_UARTA
S1.6 FTDI_UARTA DCA_LP/BP_UARTA
AWRL6844EVM IWRL6844EVM Slide Switch (S4) Figure 3-12 Slide Switch (S4)
Table 3-4 S4 Switch Settings
Reference Designator Switch OFF Switch ON
S4.1 CAN PHY A: Stand by Mode Disable CAN PHY A: Stand by Mode Enable
S4.2 LIN PHY: Enable LIN PHY: Disable
S4.3 FTDI_SPI DCA_SPI
S4.4 XDS_JTAG DCA_JTAG
S4.5 UARTB LIN
S4.6 SPIB I2C/HOST_CLK_REQ/SYS_RST_OUT