SWRZ090C January   2020  – October 2023 AWR2243

 

  1.   1
  2. 1Introduction
  3. 2Device Nomenclature
  4. 3Device Markings
  5. 4Advisory to Silicon Variant / Revision Map
  6. 5Known Design Exceptions to Functional Specifications
    1.     MSS#37
    2.     MSS#44A
    3. 5.1 MSS#50
    4. 5.2 MSS#51
    5.     ANA#08A
    6. 5.3 ANA#11A
    7. 5.4 ANA#12A
    8.     ANA#13B
    9.     ANA#18B
    10.     ANA#21A
    11.     ANA#22A
    12.     ANA#23
    13.     ANA#24
    14.     ANA#25
    15. 5.5 ANA#27A
    16.     ANA#28
    17.     ANA#53
  7.   Trademarks
  8.   Revision History

ANA#53

Upper frequency limitation of the VCO

Revision(s) Affected:

AWR2243 ES1.0, ES1.1

Description:

The PLL Control Voltage Monitor reports failure due to the VCO control voltage exceed upper monitor limit of 1390mV. This happens because certain VCO trim and certain temp conditions result in lower tuning range forcing the PLL to drive the control voltage past limits. This is a limitation of the VCO as well as sensitivity to temperature and is attributed to not enough tuning range margin across process designed into the VCO.

Workaround(s):

The customer should avoid using any frequency above 77.8GHz on VCO1 and 80.5GHz on VCO2 for functional chirps and monitors (including Synthesizer Frequency Error Monitor).

The PLL Control Voltage Monitor measures and checks the control voltage for both MIN frequency (76GHz for VCO1 and 76GHz for VCO2), and MAX frequency (78GHz for VCO1 and 81GHz on VCO2).

  • If this PLL Control Voltage Monitor reports failure on the MAX frequency, the customer software should consider it as a failure ONLY if Synthesizer Frequency Error Monitor also reports a failure.

  • If this PLL Control Voltage Monitor reports failure on the MIN frequency, the customer software should consider it as a failure independent of whether Synthesizer Frequency Error Monitor reports a failure or not.