TIDT293 October   2022

 

  1.   Description
  2.   Features
  3.   Applications
  4. 1Design Variants
  5. 2Design Overview
    1. 2.1 Board Contents
    2. 2.2 Connector Description
    3. 2.3 User Interface
      1. 2.3.1 Switches and Push-buttons
      2. 2.3.2 Jumpers
      3. 2.3.3 Potentiometers
    4. 2.4 Functional Block Diagram
    5. 2.5 Functional Block Descriptions
  6. 3Features and Performance Curves
    1. 3.1  Test Setup
    2. 3.2  Pulse
    3. 3.3  Levels and Free Run
    4. 3.4  INP
    5. 3.5  Dual-Output Power Supply
    6. 3.6  Overtemperature Protection
    7. 3.7  Slew Rate Adjust
    8. 3.8  Settling Time Adjust
    9. 3.9  Low- and High-Level Adjust
    10. 3.10 Pulse-Width Adjust
    11. 3.11 Period and Delay Adjust
    12. 3.12 Frequency Response
  7. 4Operation
    1. 4.1 Initial Setup – Jumper Selection and Potentiometer Settings
    2. 4.2 Procedure
      1. 4.2.1 Initial Power Up
      2. 4.2.2 Connecting the Circuit Under Test
  8. 5Limitations and Capabilities
    1. 5.1 Wiring Inductance
    2. 5.2 Minimum Voltage
    3. 5.3 Battery Life
  9. 6Typical Failure Mechanism
    1. 6.1 Fast Thermal Failure
    2. 6.2 Slow Thermal Failure

Period and Delay Adjust

The period adjustment is made by turning the potentiometer R36. Jumpers J8 and J9 can be installed to set the range of period adjustment. Periods range from a minimum of 11 ms and maximum of 160 ms.

The delay adjustment is made by turning the potentiometer R46. Jumpers J10 and J11 can be installed to set the range of delay adjustment. The delay ranges depend on the adjusted period.

The following scope plots are load transients of a 1-A to 5-A step at 5 V with a combination of minimum and maximum times for the period and delay.

GUID-20220531-SS0I-W91Z-3JFQ-DC2NC099CCX1-low.png Figure 3-21 Minimum Delay and Minimum Period 11 ms
GUID-20220531-SS0I-PDW8-33JK-90HFWFJ4B3JV-low.png Figure 3-22 Maximum Delay and Maximum Period 160 ms

Having a large delay with a small a period causes a mistiming between the high-level step and the low-level step. The load transient does not occur because of this mistiming. Adjust the period and delay simultaneously to avoid this mistiming.

GUID-20220531-SS0I-3GZT-BSZQ-RSZRTXS9RXDT-low.png Figure 3-23 Maximum Delay and Minimum Period Mistiming