TIDT293 October   2022

 

  1.   Description
  2.   Features
  3.   Applications
  4. 1Design Variants
  5. 2Design Overview
    1. 2.1 Board Contents
    2. 2.2 Connector Description
    3. 2.3 User Interface
      1. 2.3.1 Switches and Push-buttons
      2. 2.3.2 Jumpers
      3. 2.3.3 Potentiometers
    4. 2.4 Functional Block Diagram
    5. 2.5 Functional Block Descriptions
  6. 3Features and Performance Curves
    1. 3.1  Test Setup
    2. 3.2  Pulse
    3. 3.3  Levels and Free Run
    4. 3.4  INP
    5. 3.5  Dual-Output Power Supply
    6. 3.6  Overtemperature Protection
    7. 3.7  Slew Rate Adjust
    8. 3.8  Settling Time Adjust
    9. 3.9  Low- and High-Level Adjust
    10. 3.10 Pulse-Width Adjust
    11. 3.11 Period and Delay Adjust
    12. 3.12 Frequency Response
  7. 4Operation
    1. 4.1 Initial Setup – Jumper Selection and Potentiometer Settings
    2. 4.2 Procedure
      1. 4.2.1 Initial Power Up
      2. 4.2.2 Connecting the Circuit Under Test
  8. 5Limitations and Capabilities
    1. 5.1 Wiring Inductance
    2. 5.2 Minimum Voltage
    3. 5.3 Battery Life
  9. 6Typical Failure Mechanism
    1. 6.1 Fast Thermal Failure
    2. 6.2 Slow Thermal Failure

3.1 Test Setup

Figure 3-1 shows the setup used to test each function of the board. A Chroma 62000P bench supply is used along with a capacitor bank consisting of six 470-μF aluminum capacitors to holdup the voltage. The capacitor bank is used to emulate a device under test (DUT). The capacitors represent the output filter of a typical power supply being tested.

The current probe used is the CP150 to avoid probe saturation for large load steps. Minimize the wiring inductive loop between the load step board and test device if high a slew rate (100 A/μs) is desired.

GUID-20220616-SS0I-RKV0-RXNS-BQRDCH9C8WGQ-low.jpgFigure 3-1 Setup for Testing the Load Step Board Using a Power Supply

Vout_Load is the drain-source voltage of Q2 which droops as the gate voltage increases and drain-source current rises. Minimize this voltage droop to keep Q2 out of saturation (see the limitations of wiring inductance and minimum voltage).

Measuring at the capacitor bank represents the response of the bench supply to the load step. The capture in Figure 3-2 shows the difference between the two output voltage measurements.

GUID-20220531-SS0I-RS3F-GJN2-P4K1JWW62XXF-low.pngFigure 3-2 The Difference in Measuring Both Sides of the Capacitor Bank When Testing With the Chroma 62000p

When testing a converter, the Vout_Cap waveform depends on the control loop characteristics such as crossover frequency and phase margin. The load step requires a fast transition with respect to the converter bandwidth to fully exercise the control loop of the DUT.

Figure 3-3 shows the setup to test a converter using the PMP20967 load step board. A synchronous buck 12-V output reference design was used in this example. The output voltage response to the load step exhibits characteristics of a stable loop with a 15-kHz crossover frequency.

For best measurement accuracy of the output voltage response, a single voltage probe with ground at the DUT is used. A PCB coax probe connector with 50-Ω termination is used for this example.

Note: Avoid multiple ground connections between the load board and the device under test.
GUID-20220616-SS0I-FRMN-FQCN-FJM5BLQCBV1C-low.jpgFigure 3-3 Setup for Using the Load Step Board With a Converter Under Test
GUID-20220531-SS0I-4V9X-KJD2-CVXBNJ7H8ZZS-low.pngFigure 3-4 Load Transient Test on 12-V Output Synchronous Buck