TIDU312A May   2014  – November 2020

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 PFC Stage Implementation
    2. 1.2 BL PFC Electrical Specifications
  3. 2Software Overview
    1. 2.1 Software Control Flow
    2. 2.2 Incremental Builds
  4. 3Procedure for Running the Incremental Builds
    1. 3.1 Build 1: Open-Loop Boost With ADC Measurements
      1. 3.1.1 Build 1 Objective
      2. 3.1.2 Build 1 Overview
      3. 3.1.3 Build 1 Protection
      4. 3.1.4 Build 1 Procedure
        1. 3.1.4.1 Step 1.1: Start CCS and Open a Project
        2. 3.1.4.2 Step 1.2: Device Initialization, Main, and ISR Files
        3. 3.1.4.3 Step 1.3: Build and Load the Project
        4. 3.1.4.4 Step 1.4: Debug the Environment Windows
          1. 3.1.4.4.1 Step 1.5: Use Real-Time Emulation
          2. 3.1.4.4.2 Step 1.6: Run the Code for Build 1
    2. 3.2 Build 2: BL PFC With Closed-Current Loop
      1. 3.2.1 Build 2 Objective
      2. 3.2.2 Build 2 Overview
      3. 3.2.3 Build 2 Procedure
        1. 3.2.3.1 Step 2.1: Build and Load Project
    3. 3.3 Build 3: BL PFC With Closed Voltage and Current Loop
      1. 3.3.1 Build 3 Objective
      2. 3.3.2 Build 3 Overview
      3. 3.3.3 Build 3 Procedure
        1. 3.3.3.1 Step 3.1: Build and Load Project
  5. 4Test Results
  6. 5References
  7. 6Revision History

Build 2 Overview

Figure 3-5 shows the software blocks used in this build. Notice that 4 additional software blocks are added to the Build 1 diagram (Figure 3-1) to implement this closed current loop system. The Sine Analyzer block calculates the RMS voltage and frequency of the input voltage. PFC InvRmsSqr block calculates the inverse of the square of the RMS input voltage. This calculated value together with the rectified voltage (Vrect), the sensed DC bus voltage (Vpfc) and PFC PWM duty are used in the 3rd software block PFC_BL_ICMD to generate the reference current command PfcIcmd for the PFC current control loop. PFC_BL_ICMD block uses a 5th input VpfcVcmd for controlling the magnitude of the reference current command. Since this software build implements only the PFC current loop (open voltage loop), this parameter VpfcVcmd needs to be varied from the CCS window in order to adjust the magnitude of the reference current and hence the PFC bus voltage. A two pole two zero (2p2z) controller is used to implement the current control loop. This is the 4th software block shown in Figure 3-5 as CNTL_2P2Z:1. Depending on the control loop requirements other control blocks such as a PI or a 3p3z controller can also be used.

As shown in Figure 3-5 the current loop control block is executed at a 100 KHz rate. CNTL_2P2Z is a 2nd order compensator realized from an IIR filter structure. This function is independent of any peripherals and therefore does not require a CNF function call.

GUID-46621D94-EF26-4E53-B0A1-ECDDC78F2C90-low.gif Figure 3-5 Build 2 Software Blocks

This 2p2z controller requires five control coefficients. These coefficients and the clamped output of the controller are stored as the elements of a structure named CNTL_2P2Z_CoefStruct1. The CNTL_2P2Z block can be instantiated multiple times if the system needs multiple loops. Each instance can have separate set of coefficients. The CNTL_2P2Z instance for the current loop uses the coefficients stored as the elements of structure CNTL_2P2Z_CoefStruct1. This way a second instantiation of CNTL_2P2Z with a different structure, CNTL_2P2Z_CoefStruct2, can be used for PFC voltage loop control, as we will see in Build 3, Section 3.3.

The controller coefficients can be changed directly by modifying the values for B0, B1, B2, A1, and A2 inside the structure CNTL_2P2Z_CoefStruct1. Alternately, the 2p2z controller can be expressed in PID form and the coefficients can be changed by changing the PID coefficients. The equations relating the five controller coefficients to the three PID gains are given below. For the current loop these P, I and D coefficients are named as: Pgain_I, Igain_I and Dgain_I respectively. For the voltage loop, used in Build 3, these coefficients are named as: Pgain_V, Igain_V and Dgain_V respectively. These coefficients are used in Q26 format. To change these coefficients from the GUI environment (or from CCS watch views) they are further scaled to values ranging from 0 to 9999.

The compensator block (CNTL_2P2Z) has a reference input and a feedback input. The feedback input labeled as, Fdbk, comes from the ADC. The reference input labeled as, Ref, comes from PFC_BL_ICMD block as mentioned before. The z-domain transfer function for CNTL_2P2Z is given by:

Equation 1. GUID-C525719D-13AD-4B24-B0BB-D78A6EA2A7F3-low.gif

The recursive form of the PID controller is given by the difference equation:

Equation 2. GUID-12C25524-3B1B-4E14-B729-D9C1B8F3D10C-low.gif

where

  • Equation 3. GUID-B4773406-E676-4A19-839E-C8600C7925CA-low.gif

And the z-domain transfer function of this PID is:

Equation 3. GUID-3645B0A5-A448-409D-84FE-C8AE8B6C11E2-low.gif

Comparing this with the general form, we can see that PID is a special case of CNTL_2P2Z control where:

Equation 4. GUID-00CC70EF-0BCA-4E0B-9776-6EFE15E06E1E-low.gif

The MATH_EMAVG (Exponential Moving Average) block calculates the average of the output DC bus voltage. The output from this block is used to detect overvoltage condition followed by a PWM shutdown.