TIDUEM8B March   2019  – February 2021

 

  1.   1
  2.   2
  3.   3
  4.   4
  5.   5
  6.   6
    1.     7
      1.      8
      2.      9
    2.     10
  7.   11
    1.     12
    2.     13
      1.      14
      2.      15
      3.      16
      4.      17
      5.      18
      6.      19
      7.      20
      8.      21
      9.      22
      10.      23
    3.     24
      1.      25
        1.       26
        2.       27
        3.       28
        4.       29
          1.        30
          2.        31
      2.      32
        1.       33
          1.        34
          2.        35
          3.        36
          4.        37
          5.        38
          6.        39
          7.        40
        2.       41
          1.        42
        3.       43
          1.        44
            1.         45
            2.         46
          2.        47
          3.        48
  8.   49
    1.     50
      1.      51
      2.      52
        1.       53
          1.        54
          2.        55
        2.       56
      3.      57
    2.     58
      1.      59
        1.       60
        2.       61
        3.       62
          1.        63
          2.        64
            1.         65
            2.         66
              1.          67
                1.           68
                2.           69
              2.          70
              3.          71
      2.      72
        1.       73
        2.       74
  9.   75
    1.     76
    2.     77
    3.     78
      1.      79
    4.     80
    5.     81
    6.     82
  10.   83
    1.     84
  11.   85
  12.   86

ADS131M04

The ADS131M04 device is a four-channel, simultaneously-sampling, 24-bit, 2nd order delta-sigma (ΔΣ), analog-to-digital converter (ADC) that offers wide dynamic range, and internal calibration features making it well-suited for energy metering, power quality, and protection applications. The ADC inputs can be directly interfaced to a resistor-divider network, a transformer to measure voltage or current, or a Rogowski coil to measure current.

The individual ADC channels can be independently configured depending on the sensor input. A low noise, programmable gain amplifier (PGA) provides gains ranging from 1 to 128 to amplify low-level signals. Additionally, these devices integrate channel to channel phase alignment and offset and gain calibration registers to help remove signal chain errors. A low-drift, 1.2-V reference is integrated into the device reducing printed circuit board (PCB) area. Cyclic redundancy check (CRC) options can be individually enabled on the data input, data output and register map to ensure communication integrity. Figure 2-3 shows a block diagram of this device.

GUID-6D6BB138-3547-47C1-AAF4-06F3E08CAD9F-low.gifFigure 2-3 ADS131M04 Functional Block Diagram

In Figure 2-3, 2.7 V–3.6 V must be fed between AVDD and AGND as well as between DVDD and GND. In addition, an external clock must be connected to CLKIN. When the ADS131M04 device is configured for high-resolution mode, this clock must be between 1 MHz and 8.3 MHz for the ADS131M04 to properly work. The CLKIN clock of the ADS131M04 device can be generated from the SMCLK clock output of the MSP432 MCU. The ADS131M04 divides this clock by two and uses this divided clock for its delta-sigma modulator clock. When new ADC samples are ready, the ADS131M04 asserts its DRDY pin to alert the host MCU that there are new ADC samples that are available. Since the ADS131M04 device can accept a clock with a wide frequency range, the device itself can also be used for applications that require coherent sampling.