The TPS56x242/7 is a cost effective, high-frequency, synchronous buck converter with integrated FETs. The TPS56x242/7 operates with supply input voltage ranging from 3 V to 16 V. The TPS56x242/7 uses DCAP3™ control mode to provide a fast transient response, good line, load regulation, no requirement for external compensation, and supports low equivalent series resistance (ESR) output capacitors such as specialty polymer and ultra-low ESR ceramic capacitors.
TPS56x242/7 uses SOT563 package which can do the co-layout with last SOT563 generation part. This article introduces how to do co-lay and uses TPS564242 and TPS563202 to do an example.
Figure 1-1 is TPS564242 pin out with SOT563 package. This pin out has a little difference with last generation part TPS563202 3-A part as Figure 1-2. Most of the pin are same. The only difference is definition of pin 4. Please see Table 1-1. The Pin 4 of TPS563202 is BST pin.
|Part Number||Pin Number||Pin Name||Description|
|TPS564242||4||AGND||Ground of internal analog circuitry. Connect AGND to the GND plane.|
|TPS563202||4||BST||Supply input for the high-side NFET gate drive circuit. Connect 0.1 µF capacitor between BST and SW pin.|
TPS564242 can do co-lay with TPS563202 by adding some compatible circuit at Pin 4. Figure 1-3 shows the co-lay schematic.
If co-lay TPS564242 with TPS563202, both schematic and layout are needed to be considered, because of different pin definition. In BOM there is also small differences that need to pay attention.