SCPS145B December   2007  – February 2016 P82B715

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Sx and Sy
      2. 8.3.2 Lx and Ly
      3. 8.3.3 Lx/Ly Buffered Bus Circuitry
    4. 8.4 Device Functional Modes
      1. 8.4.1 Idle Bus
      2. 8.4.2 Active-Low Bus
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 I2C Systems
        2. 9.2.2.2 Pullup Resistance Calculation
        3. 9.2.2.3 Calculating Bus Drive Currents
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resource
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

1 Features

  • Operating Power-Supply Voltage Range of 3 V to 12 V
  • Supports Bidirectional Data Transfer of I2C Bus Signals
  • Allows Bus Capacitance of 400 pF on Main I2C Bus (Sx/Sy Side) and 3000 pF on Transmission Side (Lx/Ly Side)
  • Dual Bidirectional Unity-Voltage-Gain Buffer With No External Directional Control Required
  • Drives 10× Lower-Impedance Bus Wiring for Improved Noise Immunity
  • Multi-Drop Distribution of I2C Signals Using Low-Cost Twisted-Pair Cables
  • I2C Bus Operation Over 50 Meters of Twisted-Pair Wire
  • Latch-up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2500-V Human-Body Model (A114-A)
    • 400-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

2 Applications

  • HDMI DDC
  • Long I2C Communications
  • Industrial Communications

3 Description

The P82B715 is a device for buffering highly-capacitive I2C bus systems, and it supports bidirectional data transfer through the I2C bus. The P82B715 buffers both the serial data (SDA) and serial clock (SCL) signals on the I2C bus and allows for extension of the I2C bus, while retaining all the operating modes and features of the I2C system.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
P82B715 SOIC (8) 4.90 mm × 3.91 mm
PDIP (8) 9.81 mm × 6.35 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Block Diagram

P82B715 fbd_cps145.gif