In the high-voltage, unipolar supply configuration, the excitation voltage applied to the bridge, V_EXCITATION, cannot typically be used as the ADC supply voltage. Instead, an additional lower-voltage supply (≤ 5 V) is required to power the ADC. Moreover, the ADC cannot directly use the high-voltage excitation source as the differential reference voltage, V_REF, and instead requires an attenuation circuit. A simple resistor divider as shown in Figure 6-3 is typically used, though other options include a difference amplifier or a discrete voltage reference. Using a resistor divider or an amplifier can introduce errors between the bridge and the reference inputs that are not present between the bridge and the ADC inputs, resulting in a pseudo-ratiometric reference configuration. Choosing a discrete voltage reference results in a non-ratiometric configuration. It is also necessary to ensure the higher-voltage bridge output signals are within the lower-voltage input range of the ADC. Solving this design challenge generally requires an amplifier as shown in Figure 6-3. Adding an amplifier between the bridge and the ADC can introduce errors that are not present between the bridge and the reference inputs, further reducing the effectiveness of the pseudo-ratiometric reference configuration.

A four-wire resistive bridge measurement with a pseudo-ratiometric reference and a unipolar, high-voltage (> 5 V) supply requires:

• Differential analog inputs (AINP and AINN)
• External reference input or integrated voltage reference
• Low-noise amplifier
• High-voltage supplies
• V_REF attenuation circuit (resistor divider, difference amplifier, and so forth) or separate voltage reference
• V_IN attenuation circuit (if applicable)

First, identify the maximum differential output voltage of the bridge, V_{OUT(Bridge Max)}, using the equation from Table 6-7 and parameters from Table 6-6. This value provides the maximum output voltage possible from the bridge under normal operating conditions and corresponds to the maximum load that can be applied to the bridge, Load_{(Bridge Max)}. If the system does not use the entire output range of the bridge, V_{OUT(System Max}) defines the maximum differential output signal that is applied to a specific system and Load_{(System Max)} is the corresponding maximum load. For example, if V_{OUT(Bridge Max)} corresponds to Load_{(Bridge Max)} = 5 kg, but the system specifications only require that Load_{(System Max)} = 2.5 kg, then V_{OUT(System Max)} is given by Equation 46:

Note that if Load_{(System Max)} = Load_{(Bridge Max)}, then V_{OUT(System Max)} = V_{OUT(Bridge Max)}.

After V_{OUT(System Max)} has been determined, choose the corresponding gain value for the amplifier. For this specific circuit configuration, the gain can be applied by an external or internal amplifier. In either case, the amplifier gain should be the largest allowable value that is still less than the ADC full-scale range (FSR). In some cases it is not possible to choose an amplifier gain that uses the entire ADC FSR, especially when an ADC with an integrated PGA is selected. While this is often an acceptable tradeoff between resolution and ease-of-use, care should be taken to ensure that all system requirements are still met when the ADC FSR cannot be maximized.

Next, consider if the bridge output common-mode voltage, V_CM(Bridge), needs to be level-shifted prior to being applied to the ADC. Many ADCs used for bridge measurement applications have support collateral that can aid in this process. Figure 6-4 shows an example of how the Common-Mode Range Calculator from the ADS1261 Excel Calculator can be used to determine if V_CM(Bridge) is within the input range of the amplifier integrated into the ADS1261.

Figure 6-4 Verifying System Requirements Using the ADS1261 VCM Calculator Tool

In Figure 6-4, VIN_CM = 7.5 V, which is V_CM(Bridge) in Figure 6-3 under a no-load condition (R1 = R2 = R3 = R4). The tool highlights several errors indicating that this is not a valid input condition. This result is in spite of the fact that the differential input voltage, VIN_DIFF, is well within the ±78-mV input range of the amplifier. It is possible to choose an ADC that can measure high-voltage signals directly, such as the ADS125H02, but most ADCs require an attenuation stage when V_EXCITATION > 5 V.

If the ADC cannot directly support higher-voltage input signals, Figure 6-3 shows how an external amplifier can be used to level-shift the bridge output common-mode voltage. There are three options for the amplifier configuration:

1. An instrumentation amplifier with a high gain such as INA849
2. An integrated difference amplifier such as an INA105 with a gain of 1
3. A discrete difference amplifier or instrumentation amplifier built from multiple op amps and a resistor feedback network

Adding an amplifier between the bridge and the ADC can introduce errors at the ADC input that are not present between the bridge and the V_REF inputs, further reducing the effectiveness of the pseudo-ratiometric reference configuration. Choose an appropriate device based on the desired system accuracy and precision, while also factoring in system constraints such as cost, size, and power. Additionally, all amplifier configurations require a reference voltage, REF, to set the amplifier output common-mode voltage to an appropriate level for the ADC. This voltage is V_CM(ADC) in Table 6-6, and is typically set to mid-supply (AVDD / 2). However, Figure 6-4 shows that the ADC amplifier has a V_CM(ADC) range of 0.45 V to 4.54 V for this particular set of conditions.

Some ADCs, including the ADS1261 and ADS124S08, integrate a precision reference with an output pin that can be used to bias the amplifier and therefore minimize component count. If this feature is not available on the selected ADC, choose a low-drift, high-accuracy reference source to minimize errors. Moreover, ensure that the entire amplifier circuit is low noise and high accuracy because any error in the input signal conditioning circuitry passes to the ADC output.

After selecting an external amplifier circuit, choose the system reference source. When selecting a discrete voltage reference, ensure this component is high accuracy and low drift for best performance. To maintain a pseudo-ratiometric relationship between V_EXCITATION and V_REF, choose a resistor divider to attenuate the bridge excitation voltage. The resistor divider shown in Figure 6-3 consists of two resistors, with the reference voltage established across the bottom component, R_REF. Since the ADC AVDD is unipolar, V_REFN is typically set to 0 V such that the ratio of R_TOP to R_REF can be expressed using Equation 47:

Equation 48 determines the resistor ratio given the conditions shown in Figure 6-3 where V_REF = 5 V and V_EXCITATION = 15 V:

Therefore, if the impedance for R_REF = R, then R_TOP = 2 • R in Figure 6-3.

Select high accuracy (≤ 0.1 %), low temperature-drift (≤ 10 ppm/°C) resistors for the reference path. Keep the nominal resistance value low to limit thermal noise. As an example, a 1-kΩ resistor at 25°C and 1-kHz bandwidth contributes 128 nV_RMS of noise. These conditions are important to keep V_REF as close as possible to being ratiometric with V_EXCITATION and minimize overall measurement error. Additionally, a buffer might be required depending on the impedance of the ADC differential reference inputs. The buffer can also introduce errors and further reduce the ratiometric relationship between V_IN and V_REF.

Finally, follow the instructions in Section 5.5 if calibration is required.