Common performance metrics of a weigh scale are noise-free resolution (or counts) and offset and gain stability (drift) after calibrating the weigh scale. Table 7-1 to Table 7-4 illustrate ADC noise performance expressed as an input-referred quantity over gain, data rate, and analog supply voltage.

In this design example, the ADC analog supply voltage (5 V) is used as the bridge excitation voltage. 5-V excitation optimizes the bridge signal output compared to 3-V excitation and also has the benefit of optimizing the ADC conversion noise. Gain = 128 is selected because it also provides optimal noise performance. The front end circuitry of the ADC easily accommodates the 10-mV bridge output. In summary, the ADC configuration that yields the highest resolution while achieving the sample rate and settling time requirements is AVDD = 5 V, bridge excitation = 5 V, gain = 128, and sample rate = 10 SPS.

Signal-to-noise performance is improved by using a higher gauge-factor bridge (example 3 mV/V bridge), or by increasing the excitation voltage. If the excitation voltage > 5 V, a voltage divider is required to reduce the voltage at the ADC reference inputs.

Noise-free counts are improved by post averaging the data (for example, a moving-average filter performed in the microcontroller). A moving average filter reduces noise by a factor of √N, where N is the number of readings averaged. However, a moving average filter increases the input step settling time due to the latency caused by averaging.

The other key performance attributes are DC offset and gain drift, and 50-Hz and 60-Hz noise rejection. Figure 6-14 and Figure 6-16 illustrate the distributions of offset and gain drift performance. 50-Hz and 60-Hz noise rejection is described in Figure 8-6. The ADC provides over 100-dB rejection with ±3% variation of the ADC clock frequency.