SBAU230C August   2014  – March 2021 ADS8688

 

  1. Trademarks
  2. ADS8688EVM-PDK Overview
  3. EVM Analog Interface
    1. 3.1 ADC Analog Input Connections and Filter
    2. 3.2 Voltage Reference, Aux Input, and Supply Decoupling
  4. Digital Interface
    1. 4.1 Serial Interface (SPI)
    2. 4.2 I2C Bus for Onboard EEPROM
  5. Power Supplies
  6. ADS8688 Initial Setup
    1. 6.1 Software Installation
  7. EVM Operation
    1. 7.1 Connecting the Hardware
    2. 7.2 Modifying Hardware and Using Software to Evaluate Other Devices in the Family
    3. 7.3 EVM GUI Global Settings for ADC Control
    4. 7.4 Time Domain Display
    5. 7.5 Frequency Domain Display
    6. 7.6 Histogram Display
  8. Bill of Materials, Schematics, and Layout
    1. 8.1 Bill of Materials
    2. 8.2 Board Layout
    3. 8.3 Schematic
  9. 10Revision History

Voltage Reference, Aux Input, and Supply Decoupling

The circuit shown in Figure 3-2 illustrates the decoupling on AVDD, DVDD, and the reference IO. It is possible on the ADS8688 to use an external voltage reference, but typically the integrated internal reference is sufficient. In cases where you need to use an enthral voltage reference it can be connected via the REF test point. The capacitors for decoupling match the recomendations in the ADS8688 data sheet. The layout (see Figure 8-1) uses the shortest possible connections to the decouplign capacitors and connections the ground end to the GND plane using vias. The AUX input is a standard SAR input and does not have an analog front end. Thus, this input cannot accept high voltage input signals (Vin Full Scale = VREF = 4.096V). Furthermore, this input requires an external buffer amplifier U4 to achieve good settling.

GUID-20210312-CA0I-XNJN-FXNW-JTV8FTLTXH70-low.gifFigure 3-2 Voltage Reference, Aux Input, and Supply Decoupling