SBAU386 August   2021 AMC1350 , AMC1350-Q1 , AMC1351 , AMC1351-Q1

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Features
  3. 2Analog Interface
    1. 2.1 Analog Input
    2. 2.2 Analog Output
  4. 3Power Supplies
    1. 3.1 VDD1 Input
    2. 3.2 VDD2 Input
  5. 4EVM Operation
    1. 4.1 Analog Input and VDD1 Power: J3 and J1
    2. 4.2 Analog Outputs and VDD2 Power: J4 and J2
    3. 4.3 Device Operation
  6. 5Board Layout
  7. 6Bill of Materials and Schematic
    1. 6.1 Bill of Materials
    2. 6.2 Schematics
  8. 7Related Documentation

4.3 Device Operation

When the VDD1 and VDD2 power is applied to the EVM, the analog output is available with a fixed gain of 0.4 and a DC offset equal to 1.44 V (typical).

An analog input signal can be applied directly at screw terminal J3. See Section 2.1 and Section 3.1 for details. The analog input range is specified at –5 V to 5 V for the AMC1350 and at 0 V to 5 V for the AMC1351.

The analog output has a nominal gain of 0.4, and the nominal output is –2 V to 2 V differential for the AMC1350 or 0 V to 2 V differential for the AMC1351. The output voltage is centered on 1.44 V, providing a convenient analog input range to the embedded ADCs of the MSP430 and TMS320C2000 series of digital processors.