SBAU416B November   2022  – January 2024 ADS9813

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Overview
    1. 1.1 ADS9813EVM and ADS9817EVM Features
  5. 2ADS9813EVM and ADS9817EVM Quick Start Guide
  6. 3Analog Interface
    1. 3.1 ADC Input SMA Connections
    2. 3.2 Voltage Reference
  7. 4Digital Interface and Clock Inputs
    1. 4.1 Digital Interface Connections
    2. 4.2 Clock Select
  8. 5Power Supplies
    1. 5.1 USB Power and When to Power the Board Externally
  9. 6ADS9813EVM and ADS9817EVM Software Reference
    1. 6.1 ADS9813EVM-GUI and ADS9817EVM-GUI Software Installation
    2. 6.2 USB Driver Installation
    3. 6.3 Using the CONFIG Tab
    4. 6.4 Using the Capture Tab
    5. 6.5 Using the INL/DNL Tool
    6. 6.6 Using the Histogram Tab
  10. 7Schematics, Layouts, and Bill of Materials
    1. 7.1 Schematics
      1. 7.1.1 ADS9813EVM Schematics
      2. 7.1.2 ADS9817EVM Schematics
    2. 7.2 Layout
    3. 7.3 Bill of Materials (BOM)
      1. 7.3.1 ADS9813EVM Bill of Materials (BOM)
      2. 7.3.2 ADS9817EVM Bill of Materials (BOM)
  11. 8Revision History

5 Power Supplies

By default, the TSWDC155EVM provides the ADS9813EVM and ADS9817EVM with a 3.3-V supply ("3P3V"). The ADS9813EVM and ADS9817EVM both have a TPS61070 boost converter that boosts the 3.3-V supply to 5.4 V. By default, this voltage is applied to low-dropout regulators (LDOs) to derive the AVDD, DVDD, and IOVDD supplies when J18 is in the [1-2] position. U3 (TPS7A2050) provides the 5-V AVDD supply and U4 and U6 (TPS7A2018) provide the 1.8-V DVDD and IOVDD supplies, respectively. The LDO input voltage (LDO_IN) can be changed to an external source (5.2 V to 5.5 V) applied to terminal block J17 by placing a shunt on J18 in the [2-3] position. In this case U2 (LM66100), provides reverse polarity protection if the connection is wired incorrectly. Figure 5-1 shows the power tree schematic for the ADS9813EVM and ADS9817EVM.

GUID-20230329-SS0I-WFVZ-NSLX-ZF3X0KCN04HZ-low.svgFigure 5-1 Power Entry and Regulators