SBAU487 August 2025
The nominal voltage from the Mains is from 100V–240V so the voltage needs to be scaled down to be sensed by an ADC. Figure 2-1 shows the analog front end used for this voltage scaling. J1 is where the voltage is applied for Phase C, similar circuitry is used for each of the Phases A and C.
In the analog front end for voltage, there is a spike protection varistor (R1), a voltage divider network (R5, R10, R13, R18 and R22), and an RC low-pass filter (R27, R28, C6, C11, and C9).
At lower currents, voltage-to-current crosstalk affects active energy accuracy much more than voltage accuracy, if power offset calibration is not performed. To maximize the accuracy at these lower currents, in this design only a small part of the full ADC range is used for voltage channels. Since the ADCs of the ADS131M08 device are high-accuracy ADCs, using the reduced ADC range for the voltage channels in this design still provides more than enough accuracy for measuring voltage. Equation 1 shows how to calculate the range of differential voltages fed to the voltage ADC channel for a given Mains voltage and selected voltage divider resistor values.
Based on this formula and the selected resistor values in Figure 2-1, for a mains voltage of 120V (as measured between the line and neutral), the input signal to the voltage ADC has a voltage swing of ±128mV (91mVRMS). For a mains voltage of 230V (as measured between the line and neutral), the 230V input to the front-end circuit produces a voltage swing of ±245.33mV (173.48mVRMS). The ±128mV and the ±245.33mV voltage ranges are both well within the ±1.2V input voltage that can be sensed by the ADS131M08 device for the default PGA gain value of 1 that is used for the voltage channels.