Design Goals

Design Description

This circuit provides programmable, non-inverting gains ranging from 6dB (2V/V) to 60dB (1000V/V) using a variable input resistance. The design maintains the same cutoff frequency over the gain range.

Design Notes

1. Choose a digital potentiometer, such as TPL0102 for R₁ to design a low-cost digital programmable gain amplifier.
2. R₃ sets the maximum gain when R₁ approaches 0 Ω.
3. A feedback capacitor limits the bandwidth and prevent stability issues.
4. Evaluate stability across the selected gain range. The minimum gain setting is likely the most sensitive to stability issues.
5. Some digital potentiometers can vary in absolute value by as much as ±20% so gain calibration may be necessary.

Design Steps

1. Choose R₂ and R₃, to set the maximum gain when R₁ approaches 0:
   $$\begin{gathered} {\mathrm{G}}_{\max }=1+\frac{{\mathrm{R}}_2}{{\mathrm{R}}_3} \\ {\mathrm{G}}_{\max }-1=\frac{{\mathrm{R}}_2}{{\mathrm{R}}_3}\to {\mathrm{R}}_2=({\mathrm{G}}_{\max }-1)\times {\mathrm{R}}_3 \\ \mathrm{Set} {\mathrm{R}}_3=\text{100 }\mathrm{\Omega } \\ {\mathrm{R}}_2=(\text{1000 }\frac{\mathrm{V}}{\mathrm{V}}-1)\times 100=\text{99 }\mathrm{k\Omega }\to {\mathrm{R}}_2=\text{100 }\mathrm{k\Omega } (\mathrm{Standard} \mathrm{value}) \end{gathered}$$
2. Choose the potentiometer maximum value to set the minimum gain:
   $$\begin{gathered} {\mathrm{G}}_{\min }=1+\frac{{\mathrm{R}}_2}{{\mathrm{R}}_{1,\max }+{\mathrm{R}}_3} \\ {\mathrm{G}}_{\min }-1=\frac{{\mathrm{R}}_2}{{\mathrm{R}}_{1,\max }+{\mathrm{R}}_3} \\ {\mathrm{R}}_{1,\max }+{\mathrm{R}}_3=\frac{{\mathrm{R}}_2}{{\mathrm{G}}_{\min }-1} \\ {\mathrm{R}}_{1,\max }=\frac{{\mathrm{R}}_2}{{\mathrm{G}}_{\min }-1}-{\mathrm{R}}_3=\frac{100\mathrm{k\Omega }}{2-1}-100\mathrm{\Omega }=99.9\mathrm{k\Omega }\to {\mathrm{R}}_{1,\max }=100\mathrm{k\Omega } (\mathrm{Standard} \mathrm{value}) \\ {\mathrm{R}}_{1,\min }=0\mathrm{\Omega } (\mathrm{Wiper} \mathrm{resistance}, \mathrm{typically} 25\mathrm{\Omega }, \mathrm{will} \mathrm{introduce} \mathrm{some} \mathrm{error}) \end{gathered}$$
3. Choose the bandwidth with a feedback capacitor:
   $$\begin{gathered} {\mathrm{f}}_{\mathrm{c}}=\frac{\mathrm{GBW}}{{\mathrm{G}}_{\max }}=\frac{7\mathrm{MHz}}{1000{\displaystyle \frac{\mathrm{V}}{\mathrm{V}}}}=7\mathrm{kHz} \\ {\mathrm{f}}_{\mathrm{c}}=7\mathrm{kHz}\to {\mathrm{C}}_1=\frac{1}{2\mathrm{\pi }\times {\mathrm{R}}_2\times {\mathrm{f}}_{\mathrm{c}}}=227\mathrm{pF} \to {\mathrm{C}}_1=220\mathrm{pF} (\mathrm{Standard} \mathrm{Value}) \end{gathered}$$
4. Check for stability at minimum gain (2V/V), which is when R₁=100kΩ. To satisfy the requirement f_c (circuit bandwidth) must be less than f_zero (zero created by the resistive feedback network and the differential and common-mode input capacitances).
   $$\begin{gathered} {\mathrm{f}}_{\mathrm{c}}=\frac{1}{2\mathrm{\pi }\times {\mathrm{C}}_1\times {\mathrm{R}}_2}=\text{7 }\mathrm{kHz} \\ {\mathrm{f}}_{\mathrm{zero}}=\frac{{\displaystyle 1}}{{\displaystyle 2\mathrm{\pi }\times ({\mathrm{C}}_{\mathrm{cm}}+{\mathrm{C}}_{\mathrm{diff}})\times ({\mathrm{R}}_2\parallel {\mathrm{R}}_1)}}=\frac{1}{2\times \mathrm{\pi }\times (\text{3 }\mathrm{pF}+\text{2 }\mathrm{pF})\times \left(\frac{\text{100 }\mathrm{k\Omega }\times \text{100 }\mathrm{k\Omega }}{\text{100 }\mathrm{k\Omega }+\text{100 }\mathrm{k\Omega }}\right)} \\ {\mathrm{f}}_{\mathrm{zero}}=\text{637 }\mathrm{kHz} \\ \text{7 }\mathrm{kHz}<\text{637 }\mathrm{kHz}\to {\mathrm{f}}_{\mathrm{c}}<{\mathrm{f}}_{\mathrm{zero}} \end{gathered}$$

Design Simulations

Transient Simulation Results

AC Simulation Results

References:

1. Texas Instruments, Simulation for Discrete Programmable Gain Amplifier Circuit, product page
2. Texas Instruments, Low-Cost Digitally Programmable Gain Amplifier Reference Design, product page

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