SBOA310B December   2018  – September 2024 OPA192 , OPA2990 , TLV9102 , TLV9302

 

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  3.   Revision History
  4.   Trademarks

Design Goals

Input Output Supply
IiMin IiMax VoMin VoMax Vcc Vee
50mA 1A 0.25V 5V 36V 0V

Design Description

This single–supply, high–side, low–cost current sensing method detects load current between 50mA and 1A and converters it to an output voltage from 0.25V to 5V. High–side sensing allows for the system to identify ground shorts and does not create a ground disturbance on the load.

Design Notes

  1. DC common mode rejection ratio (CMRR) performance is dependent on the matching of the gain setting resistors, R2-R5.
  2. Increasing the shunt resistor increases power dissipation.
  3. Verify that the common–mode voltage is within the linear input operating region of the amplifier. The common mode voltage is set by the resistor divider formed by R2, R3, and the bus voltage. Depending on the common–mode voltage determined by the resistor divider a rail–to–rail input (RRI) amplifier may not be required for this application.
  4. An op amp that does not have a common-mode voltage range that extends to Vcc may be used in low–gain or an attenuating configuration.
  5. A capacitor placed in parallel with the feedback resistor limits bandwidth, improve stability, and help reduce noise.
  6. Use the op amp in a linear output operating region. Linear output swing is usually specified under the AOL test conditions.

Design Steps

  1. The full transfer function of the circuit is provided below.
    V o = I in × R 1 × R 5 R 4 Given   R 2 = R 4   and   R 3 = R 5
  2. Calculate the maximum shunt resistance. Set the maximum voltage across the shunt to 100mV.
    R 1 = V iMax I iMax = 100 mV 1 A = 100 m
  3. Calculate the gain to set the maximum output swing range.
    Gain = V oMax - V oMin ( I iMax - I iMin ) × R 1 = 5 V - 0.25 V ( 1 A - 0.05 A ) × 100 m = 50 V V
  4. Calculate the gain setting resistors to set the gain calculated in step 3.
    Choose   R 2 = R 4 = 1 . 01 k   ( Standard   value ) R 3 = R 5 = R 2 × Gain = 1 . 01 k × 50 V V = 50 . 5 k ( Standard   value )
  5. Calculate the common–mode voltage of the amplifier to establish linear operation.
    V cm = V CC × R 3 R 2 + R 3 = 36 V × 50.5 k 1.01 k + 50.5 k = 35 .294 V
  6. The upper cutoff frequency (fH) is set by the non–inverting gain (noise gain) of the circuit and the gain bandwidth (GBW) of the op amp.
    f H = GBW  Noise Gain = 10 MHz 51 V V = 196 . 1   kHz

Design Simulations

 DC Simulation Results DC Simulation Results
 AC Simulation Results AC Simulation Results

References:

Texas Instruments, SBOMAV4 simulation file, software support

Design Featured Op Amp

OPA192
Vcc 4.5V to 36V
VinCM Rail–to–rail
Vout Rail–to–rail
Vos 5µV
Iq 1mA
Ib 5pA
UGBW 10MHz
SR 20V/µs
#Channels 1, 2, and 4
OPA192

Design Alternate Op Amp

OPA2990
Vcc 2.7V to 40V
VinCM Rail–to–rail
Vout Rail–to–rail
Vos 250µV
Iq 120µA
Ib 10pA
UGBW 1.25MHz
SR 5V/µs
#Channels 2
OPA2990