2 Implications of Parasitics

When designing a circuit we often overlook parasitics, but in reality parasitics are always present and cause deviations from expected behavior, which can alter data collection. What happens when these unexpected effects occur? When designing a printed circuit board (PCB), the designer must keep in mind that all traces are slightly resistive, capacitive, and inductive. These effects are otherwise known as parasitics. Especially in high frequency measurements, designing with parasitics is incredibly important to verify the LDO works as expected. Resistive parasitics can cause gain errors, create DC voltage errors, and create mismatches at the inputs of the gain amplifier that is present in an LDO. Capacitive and inductive parasitics can cause unwanted noise and signal coupling to occur. Capacitive parasitics can also cause instability to occur in the circuit. Inductive parasitics can increase the return loop inductance and can create LC resonances that cause oscillations during transients.

For LDOs, noise coupling and instability is especially important when taking high frequency measurements. With parasitics present in a circuit, additional ringing, oscillation, and unwanted noise coupling through a ground plane of power supply can be present in high frequency measurements. Examples of where parasitics can be present in a circuit are:

1. Microstrip Copper Traces:
   1. Microstrip copper traces are transmission lines referenced to copper plane typically used for high frequency signals.
2. Parallel Copper Planes
   1. Parallel copper planes are large sections of copper in the PCB intended for power signals, which are meant to carry hundreds of miliamps to amps. Parallel copper planes are used as a low-impedance access to power or ground, but often create capacitive parasitics.
3. Vias
   1. Vias connect signals between different layers on a PCB, but often create capacitive and inductive parasitics.
4. Adjacent Copper Traces
   1. Adjacent copper traces allow for routing to related groups of signals around a PCB, but often creates capacitive and inductive parasitics and allows for coupling of signal between traces, otherwise known as cross talk. The closer the traces are to one another, the stronger the coupling.

Before taking a measurement, we highly recommend controlling inductive and capacitive parasitics. To control inductive and capacitive parasitics, cut out copper planes and traces under sensitive test nodes, and minimize the use of vias on critical signal traces. If vias cannot be avoided in a power trace, the use of multiple vias helps to reduce the parasitic effect. Additionally, use short, direct signal routing to minimize unwanted noise coupling, and place ground copper between adjacent traces to minimize cross talk, which is especially important when designing with dual input or dual output LDOs. To reduce inductance, the return path for high-frequency transient currents needs to be parallel to the current carrying trace, but this can add parasitic capacitance to the circuit. Finally, we recommend reducing cabling attached to the device under test (DUT).