SBVS470A February   2026  – March 2026 TPS7N59

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Voltage Setting and Regulation
      2. 6.3.2 Low-Noise, Ultra-High Power-Supply Rejection Ratio (PSRR)
      3. 6.3.3 Programmable Soft-Start
      4. 6.3.4 Precision Enable and UVLO
      5. 6.3.5 Power-Good Pin (PG Pin)
      6. 6.3.6 Active Discharge
      7. 6.3.7 Thermal Shutdown Protection (TSD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
      4. 6.4.4 Current-Limit Operation
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1  Precision Enable (External UVLO)
      2. 7.1.2  Undervoltage Lockout (UVLO) Operation
        1. 7.1.2.1 IN Pin UVLO
        2. 7.1.2.2 BIAS UVLO
        3. 7.1.2.3 Typical UVLO Operation
      3. 7.1.3  Dropout Voltage (VDO)
      4. 7.1.4  Input and Output Capacitor Requirements (CIN and COUT)
      5. 7.1.5  Recommended Capacitor Types
      6. 7.1.6  Soft-Start, Noise Reduction (NR/SS Pin), and Power-Good (PG Pin)
      7. 7.1.7  Optimizing Noise and PSRR
      8. 7.1.8  Adjustable Operation
      9. 7.1.9  Load Transient Response
      10. 7.1.10 Sequencing
      11. 7.1.11 Power-Good Functionality
      12. 7.1.12 Current Mode Margining
      13. 7.1.13 Voltage Mode Margining
      14. 7.1.14 Power Dissipation (PD)
      15. 7.1.15 Estimating Junction Temperature
      16. 7.1.16 TPS7N58EVM-184 Thermal Analysis
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1.     66

7.1.1 Precision Enable (External UVLO)

The precision enable circuit (EN pin) turns the device on and off. This circuit can be used to set an external undervoltage lockout (UVLO) voltage, as shown in Figure 7-1, to turn on and off the device using a resistor divider between IN (or BIAS), EN, and GND.

TPS7N59 Precision EN Used as an External UVLO Figure 7-1 Precision EN Used as an External UVLO

This external UVLO design is used to prevent the device from turning on when the input supply voltage is not high enough and can place the device in dropout operation. This design also allows simple sequencing of multiple power supplies with a resistor divider from another supply. Another benefit from using a resistor divider to enable or disable the device is that the EN pin is never left floating because this pin does not have an internal pulldown resistor. However, a Zener diode can be needed between the EN pin and ground to comply with the absolute maximum ratings on this pin.

Use Equation 1 and Equation 2 to determine the correct resistor values.

Equation 1. VON = VOFF × [(VIH(EN) + VHYS(EN)) / VEN]
Equation 2. R(TOP) = R(BOTTOM) × (VOFF / VIH(EN) – 1)

where:

  • VOFF is the input or bias voltage where the regulator turns off
  • VON is the input or bias voltage where the regulator turns on

Note: For the EN pin input current, IEN, effects are ignored.