SCES463J June   2003  – January 2026 SN74LVC1G3157-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics 125C
    7. 5.7 Analog Channel Specifications
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

5.6 Switching Characteristics 125C

over operating free-air temperature range (unless otherwise noted)
Parameter FROM (INPUT) TO (OUTPUT) VCC MIN NOM MAX UNIT
tpd(1) RL = 250Ω, CL = 50pF, Vload = VCC A or Bn Bn or A 1.8V ± 0.15V 2 ns
2.5V ± 0.2V 1.2
3.3V ± 0.3V 0.8
5V ± 0.5V 0.5
ten(2) RL = 250Ω, CL = 50pF, Vload = VCC S Bn 1.8V ± 0.15V 5 24 ns
2.5V ± 0.2V 3.5 14
3.3V ± 0.3V 2.5 8
5V ± 0.5V 1.7 7
tdis(3) RL = 250Ω, CL = 50pF, Vload = VCC, VΔ = 0.3V 1.8V ± 0.15V 3 13
2.5V ± 0.2V 2 7.5
3.3V ± 0.3V 1.5 6.5
5V ± 0.5V 0.8 5
TB-M(4) Break before make time 1.8V ± 0.15V 0.5 ns
2.5V ± 0.2V 0.5
3.3V ± 0.3V 0.5
5V ± 0.5V 0.5
(1) tpd is the slower of tPLH or tPHL. The propagation delay is calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance when driven by an ideal voltage source (zero output impednace).
(2) ten is the slower of tPZL or tPZH.
(3) tdis is the slower of tPLZ or tPHZ.
(4) Specified by design